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sdram
数字ic设计,二级缓存,格雷码,深度256,(Digital IC design, two level cache, gray code, depth 256.)
- 2018-10-31 10:40:37下载
- 积分:1
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gcounter1
数字钟vhdl实现,在线测试无误,具有闹钟,对表功能(Digital clock vhdl implementation, online testing is correct, with alarm, the table function)
- 2013-10-19 22:06:16下载
- 积分:1
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Hardware-CNN-master
说明: Convolutional neural network code for fpga
- 2019-02-27 15:21:22下载
- 积分:1
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SOPC技术使用 verilog编的hello 程序
SOPC技术的fpga的实现verilog硬件描述语言,编写的在niosII 程序 采用altera芯片
- 2022-10-13 07:35:04下载
- 积分:1
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RISC-V-Reader-Chinese-v2p1
说明: RISC-V 芯片设计规范,很有参考价值,开源芯片设计必备参考资料,希望对大家有帮助。(The RISC-V Foundation is chartered to standardize and promote the open RISC-V instruction set architecture)
- 2020-07-01 23:00:02下载
- 积分:1
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24小时计时时钟
说明: 实现24小时计时,因为位数不够,这里是12进位,可自行调整进位数(Realize 24-hour timing, because the number of digits is not enough, here is 12 carry, you can adjust the carry number by yourself.)
- 2020-06-23 19:40:01下载
- 积分:1
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ICAP_FPGA_Multiboot
在xilinx的ml507板子上用的ICAP功能 配置存储器 这里边包含了控制程序 以及配置ICAP寄存器的程序 就是完整的通过串口控制FPGA多重配置的程序 用verilog实现的(how to configure the ICAP)
- 2021-03-05 15:49:31下载
- 积分:1
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Vhdl_Programming_Example
vhdl编程语言电子书,英文的,有很多例子(VHDL programming language e-books, in English, there are many examples of)
- 2009-01-16 20:59:00下载
- 积分:1
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keygen
ISE 9.2 serials working
- 2021-03-29 14:39:10下载
- 积分:1
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FIFO
fifo异步串口收发程序 FPGA程序(fifo asynchronous serial transceiver)
- 2014-05-07 21:28:49下载
- 积分:1