-
16QAM-modulation-based-on-FPGA
基于FPGA的16QAM调制程序,基于verilog开发环境(16QAM modulation program based on FPGA-based development environment verilog)
- 2014-05-07 14:05:25下载
- 积分:1
-
ps2_mouse
ps2 mouse controller
- 2008-09-27 21:29:42下载
- 积分:1
-
JV50128
bios spi flash acer 5740g
- 2013-06-28 18:48:06下载
- 积分:1
-
终结者扰频器
In 电信, a 扰频器是一种设备,则转置或反转信号或以其他方式进行编码 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2023-04-16 00:10:03下载
- 积分:1
-
ODBC
ODBC编程实例,使用ODBC对基于开关量数据采集卡的通信接口设计与实现。(ODBC programming examples, using ODBC for data acquisition card based digital communications interface design and implementation.)
- 2013-07-14 13:16:35下载
- 积分:1
-
UART
说明: 使用FPGA的FIFO,状态机,乒乓操作等实现了异步UART。(The use of FPGA-FIFO, state machine, ping-pong operation to achieve the asynchronous UART.)
- 2008-10-09 15:59:20下载
- 积分:1
-
turbo[1].tar
turbo码的verilog程序,有意者请下载。(turbo code verilog procedures Interested parties please download.)
- 2021-01-14 17:58:46下载
- 积分:1
-
my
说明: 64位数据的CRC-32校验的,Verilog实现,算法并行优化(64-bit data CRC-32 checksum, Verilog implementation of a parallel optimization algorithm)
- 2011-09-17 19:36:16下载
- 积分:1
-
zuoye2
主要编写了一组二进制数据通过根升余弦滤波器后的波形,但并没有使用ISE内部的FIR滤波器内核,该程序相当于编写了一个根升余弦滤波器。(Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.)
- 2013-09-18 15:24:13下载
- 积分:1
-
UDP
用verilog实现的UDP协议,包括arp,udp,ip分段协议等,对于想用FPGA实现TCP/IP协议的人来说,应该会起到一定的帮助作用(Implemented with verilog UDP protocols, including arp, udp, ip fragmentation protocol, etc., who want to achieve TCP/IP protocol with the FPGA people, should play a helpful role)
- 2021-04-05 04:39:03下载
- 积分:1