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简易数字钟程序（基于ALTERA quartusII）
一个简易数字钟程序，可以实现24小时精确计时、整点报时、时钟矫正、时钟复位等功能
- 2022-03-20 09:54:44下载
- 积分：1
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Altera_Audio
针对Altera的DE2/ DE1交互板的音频核心的音频编解码器（编码器/解码器），并提供了音频输入和输出的接口。(The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1
Boards and provides an interface for audio input and output.)
- 2015-04-01 22:21:49下载
- 积分：1
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HM74YM
在QUARTUS II上实现（7,4）汉明码的译码VHDL语言设计((7,4)Hamming decoder)
- 2015-05-09 11:14:17下载
- 积分：1
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基于FPGA的DDS
基于FPGA的DDS。可以产生三种波形：正弦，方波，三角波。频率分辨率0.012Hz。频率从0至25MHz任意可调。(FPGA-based DDS. Can produce three waveforms: sine, square, triangle wave. Frequency resolution 0.012Hz. Frequency is adjustable from 0 to 25MHz.)
- 2013-08-05 07:06:22下载
- 积分：1
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CPU
运用vhdl硬件描述语言在quartus II开发环境下独立设计与实现了基于精简指令集的五级流水线CPU的设计与实现。该流水CPU包括：取指模块，译码模块，执行模块，访存模块，写回模块，寄存器组模块，控制相关检测模块，Forwarding模块。该CPU在TEC-CA实验平台上运行，并且通过Debugcontroller软件进行单步调试，实验表明，该流水线CPU消除了控制相关、数据相关和结构相关。(Using vhdl hardware description language development environment under quartus II design and implementation of an independent design and implementation of a five-stage pipeline RISC-based CPU' s. The water CPU include: fetch module, decoding module, execution modules, memory access module, the write-back module, the register set of modules, control relevant to the detection module, Forwarding module. The CPU in the TEC-CA experimental platforms, and single-step debugging through Debugcontroller software, experiments show that the pipelined CPU eliminates the control-related, data-related and structurally related.)
- 2020-09-21 10:37:53下载
- 积分：1
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JIAOTONGDENG
用VERILOG实现 交通灯控制，且运行正确，希望有帮助(Use VERILOG implementation traffic light control, and operation right, hope to have help)
- 2014-01-05 20:38:03下载
- 积分：1
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cordic
实现可连续输入数据做三角函数变换处理，通过verilog代码实现，(It realizes triangular function transformation for continuous input data.)
- 2020-06-21 22:40:01下载
- 积分：1
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PIC单片机学习软件及其资料
PIC单片机学习软件及其资料，入门到精通(PIC MCU learning software and its information, entry to proficiency)
- 2019-07-04 17:17:40下载
- 积分：1
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四通道DDS信号发生器
四通道DDS信号发生器，很好用的代码，大家一起分享(Four-channel DDS signal generator)
- 2021-03-08 14:49:28下载
- 积分：1
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422
说明： 422发送源码，目前使用的是20m时钟计算出来的波特率，后期可以根据自己的需要进行修改波特率时期匹配各种情况(422 sends the source code. At present, the baud rate calculated by 20m clock is used. Later, you can modify the baud rate according to your own needs to match various situations)
- 2021-04-07 15:29:01下载
- 积分：1
