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Some pdf s for VC contrls
Some pdf s for VC contrls
- 2023-05-27 08:45:04下载
- 积分：1
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THR1064 type card read, write, encryption, etc. an excellent reference, it is a...
THR1064类卡的读、写加密等等的绝好的参考资料，可惜的是没有d-THR1064 type card read, write, encryption, etc. an excellent reference, it is a pity there is no d
- 2023-04-15 07:00:03下载
- 积分：1
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xml,xsl实现动态分页,很不错的啊
xml,xsl实现动态分页,很不错的啊-xml, xsl dynamic tabs, very good ah
- 2022-02-03 03:13:40下载
- 积分：1
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C++ primer 第三版的习题答案，与书搭配使用。
C++ primer 第三版的习题答案，与书搭配使用。-C++ Primer third edition problem sets, and books for use with.
- 2022-03-04 12:37:23下载
- 积分：1
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Classic computer failures can be found here, this book did not have to point out...
经典的电脑故障可以在这里找到，本书有指出一些平时没注意的问题，对菜鸟很有用-Classic computer failures can be found here, this book did not have to point out some problems in peacetime, the rookie useful
- 2022-03-06 14:15:43下载
- 积分：1
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《VisualC++视频技术方案宝典》，人民邮电出版社出版，2008年出版。共九章，对音视频编码工程很有帮助。这是第一章的源码。...
《VisualC++视频技术方案宝典》，人民邮电出版社出版，2008年出版。共九章，对音视频编码工程很有帮助。这是第一章的源码。-" VisualC++ Video Technology Program Collection," Posts And Telecommunications News Publishing House, published in 2008. A total of nine chapters, the audio and video coding project helpful to a
- 2022-03-31 16:41:57下载
- 积分：1
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database of good things
数据库方面的好东西-database of good things
- 2022-07-01 07:20:29下载
- 积分：1
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总共九章新的起点：VC六概述VC6开发…
新起点共有9章：vc++6概述,vc6开发环境，面向对象编程基础，c++语言间接，windows编程间接，MFC基础及通用类，文档及视图，对话框与控件以及DLL,DDE,activeX等高级话题-new starting point for a total of nine chapters : vc six overview vc6 development environment, based on object-oriented programming, C language indirectly, windows programming indirect, based MFC and generic class, and view files, and dialog controls and DLL, DDE, activeX senior topic
- 2022-07-27 11:09:13下载
- 积分：1
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FPGA pipelined designs on paper This work investigates the use of very deep pipe...
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work invest
- 2022-11-28 12:05:03下载
- 积分：1
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javascript手册，详细介绍了其用法。里面包含各种实例
javascript手册，详细介绍了其用法。里面包含各种实例-javascript manual, detailing its use. Various examples of which contains
- 2022-12-06 09:20:03下载
- 积分：1
