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16b20b_Encoder
16b20b encoder and decoder
- 2013-02-04 13:24:46下载
- 积分：1
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标准电视信号的同步生成程序，利用VHDL和原理图，利用Quartus综合...
标准电视信号的同步生成程序，利用VHDL和原理图，利用Quartus综合-Standard television signal to generate the synchronization procedures, the use of VHDL and schematic diagram, using Quartus integrated
- 2022-03-13 05:08:34下载
- 积分：1
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使用硬件描述语言(VHDL)的实现或门
entity or1 is(a,b:in std_logic;y:out std_logic);architecture dataflow of or1 isbeginy
- 2022-03-11 13:09:15下载
- 积分：1
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RISC CPU IP CORE can be used to direct the development and application of the pr...
RISC CPU IP CORE
可以用于直接的工程开发应用
有详细的说明书-RISC CPU IP CORE can be used to direct the development and application of the project has a detailed brochure
- 2023-02-24 21:15:03下载
- 积分：1
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Cadence VHDL Operational the package, seeking to achieve root, You are not squar...
Cadence的VHDL运算库包，实现求方根，平方你是不是以前不知道怎么弄．哈哈．-Cadence VHDL Operational the package, seeking to achieve root, You are not square did not know how get. Ha ha.
- 2022-08-16 03:35:39下载
- 积分：1
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VHDL
Project manager is reak vhdl old man
- 2015-09-10 10:06:28下载
- 积分：1
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MAC
在FPGA硬件上，使用verilog语言编写的一个乘累加器程序。(FPGA hardware, a multiply accumulator verilog language program.)
- 2012-10-18 20:28:25下载
- 积分：1
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SAR-ADC
Complete Successive approximation Analog to digital converter along with the source code
- 2013-04-21 23:42:03下载
- 积分：1
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基于FPGA的1024点流水线工作方式的FFT实现,适合fpga的技术人员做信号处理参考...
基于FPGA的1024点流水线工作方式的FFT实现,适合fpga的技术人员做信号处理参考-FPGA based on the work of the 1024-point pipelined FFT approach the realization of the technical staff for doing fpga signal processing reference
- 2022-12-04 23:40:03下载
- 积分：1
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spi_interface
spi通用串行总线，4线控制，可读写操作(SPI universal serial bus, 4-wire control, readable and writable operation)
- 2019-04-29 12:37:55下载
- 积分：1
