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通过EMIF连接fpga与dsp的代码
通过EMIF连接fpga与dsp的代码-Through the EMIF connection FPGA code with dsp
- 2022-03-16 17:42:36下载
- 积分：1
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data_rom
正弦信号发生器，用VHDL来完成，抗干扰能力较强，(Sinusoidal signal generator, using VHDL to accomplish, a strong anti-interference ability,)
- 2009-07-15 22:44:02下载
- 积分：1
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lab1(mka)
RGB vga driver for manipulating the colours of a given image buffer. The code has beeen written in vhdl
- 2011-04-15 18:11:48下载
- 积分：1
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LCD12864(st7920)
整理的网上关于LCD12864(ST7920控制器）的串并口程序，已在stc89c52rd+11.0592MHz的情况下测试通过(Finishing line on LCD12864 (ST7920 controller) serial and parallel programs, in the case of stc89c52rd+11.0592 MHz test)
- 2020-09-13 08:48:00下载
- 积分：1
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VHDL语言按VGA接口标准把数字图像信号转换成标准VGA格式。适合做学习试验...
VHDL语言按VGA接口标准把数字图像信号转换成标准VGA格式。适合做学习试验-VHDL by VGA interface standards, digital image signal conversion into a standard VGA format. Suitable for the pilot study
- 2022-05-08 02:59:08下载
- 积分：1
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Verilog-SRAM
用verilog hdl语言编写的fpga与片外sram 的读写控制(With the verilog hdl language fpga sram chip with read and write control)
- 2020-12-09 15:39:18下载
- 积分：1
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Marquee with a program written in VHDL, and 60 binary counter program, one desig...
一个用VHDL编写的跑马灯程序和60进制计数器的程序，一个是自己设计的一个是老师要求，都在实验箱上验证成功，希望对大家有所帮助。-Marquee with a program written in VHDL, and 60 binary counter program, one designed by one teacher asked, are in the experimental boxes proved to be successful, want to help everyone.
- 2022-08-10 07:53:33下载
- 积分：1
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实例
说明： FPGA 学习实例 动态时钟、面积、速度优化相关代码(Codes related to dynamic clock, area and speed optimization for learning examples of FPGA)
- 2020-06-22 22:40:02下载
- 积分：1
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code
浙江大学体系结构实验代码 实现流水线的forwarding(Architecture, Zhejiang University Experimental code pipeline forwarding)
- 2020-09-26 11:57:46下载
- 积分：1
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计数器的VHDL语言
这个程序VHDL计数器计数二进制数并显示脉冲易于程序计数器的VHDL，我们需要了解逻辑电路的VHDL语言的程序员
- 2022-12-04 13:20:03下载
- 积分：1
