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Building the CPU datapath
Building the CPU datapath
- 2022-07-24 12:10:47下载
- 积分：1
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EMIF
EMIF接口调试代码，使用的是Verilog语言，FPGA与DSP通信，测试成功(EMIF interface debugging code that USES the Verilog language, FPGA and DSP communication, testing success)
- 2020-12-04 10:39:24下载
- 积分：1
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Asqare
用fpga实现的连连看游戏，功能还不完善，不过可以借鉴。(Realize with FPGA Lianliankan game, function is not perfect, but can be used for reference.)
- 2012-08-27 18:39:59下载
- 积分：1
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verilogsram
FPGA Verilog HDL 读写SRAM(SRAM FPGA Verilog HDL to read and write)
- 2012-11-11 11:41:04下载
- 积分：1
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dl.sh
linux cmd line download script
- 2012-03-15 02:51:11下载
- 积分：1
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IC设计流程和设计方法
IC的设计可以分为两个部分，分别为：前端设计（也称逻辑设计）和后端设计（也称物理设计），这两个部分并没有统一严格的界限，凡涉及到与工艺有关的设计可称为后端设计。(The design of IC can be divided into two parts: front-end design (also called logic design) and back-end design (also known as physical design). These two parts do not have a uniform and strict boundary, and the design related to process can be called back-end design.)
- 2020-07-01 23:00:02下载
- 积分：1
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步进电机
此代码是用于旋转一个步进电机所需的方向。
- 2022-10-22 10:05:04下载
- 积分：1
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Beamforming
基于FPGA的波束形成，包括ad转换，数据存储等部分。。(FPGA-based beamforming, including ad conversion, data storage and other parts. .)
- 2016-04-25 11:12:30下载
- 积分：1
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STOPWATCH
STOPWATCH FPGA SEVEN SEGMENT DISPLAY
- 2014-04-16 11:08:57下载
- 积分：1
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用verilog语言写的串口通信程序,包括收发两个模块,可用于FPGA的通信中,可通过程序设置收发的位数,有很好的扩展性....
用verilog语言写的串口通信程序,包括收发两个模块,可用于FPGA的通信中,可通过程序设置收发的位数,有很好的扩展性.-Verilog language used to write serial communication program, including the sending and receiving two modules can be used for FPGA communications, you can send and receive through the program to set the number of bits, there is a very good scalability.
- 2022-06-17 10:57:04下载
- 积分：1
