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Verilog_HDL源码， Verilog_HDL源码
Verilog_HDL源码， Verilog_HDL源码-Verilog_HDL source, Verilog_HDL FO
- 2022-06-21 00:23:39下载
- 积分：1
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用于sopc builder添加组件用的ps/2
键盘 ipcore
用于sopc builder添加组件用的ps/2
键盘 ipcore-Sopc builder used to add components used ps/2 keyboard IPCore
- 2022-03-12 14:54:04下载
- 积分：1
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ex4
statemachine project for my school
- 2011-12-02 21:07:27下载
- 积分：1
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fifo
fifo的代码,经过测试可以使用，很有用处，可以放心使用(a fifo module,the code has been tested and it is usefull)
- 2010-03-02 22:03:30下载
- 积分：1
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FPGA RAND 生成伪随机数
FPGA生成伪随机数,希望对加密的童鞋有用(FPGA generates pseudo-random numbers, we want to be useful)
- 2013-08-05 16:43:55下载
- 积分：1
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UVM实战_卷Ⅰ
说明： 本书纸版由机械工业出版社于2014年出版，张强编著，电子版由华章分社（北京华章图文信息有限公司）全球范围内制作与发行(The book was published in paperback by China machine press in 2014, and edited by zhang qiang. The electronic version was produced and distributed worldwide by huazhang branch (Beijing huazhang graphic information co., LTD.))
- 2020-10-12 23:07:32下载
- 积分：1
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show frequency measurement, external 24MHz crystal oscillator, the data show tha...
显示频率测量，外接24MHz晶振，显示数据为三位，分四个档来测量-show frequency measurement, external 24MHz crystal oscillator, the data show that three, four hours to measure stalls
- 2022-03-16 13:33:43下载
- 积分：1
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encoder_Z64_all_rate
Wimax矩阵的LDPC编码器，已通过modelsim仿真测试，并前在altera的FPGA板上通过测试,码率5/6，可进入代码内部修改参数，支持2/3,3/4其他2个码率，数据吞吐量为700M(Wimax based LDPC encoder, modelsim simulation passed, also passed on altera FPGA board, code rate 5/6, also support 2/3,3/4, throughout 700m)
- 2012-03-19 09:44:32下载
- 积分：1
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vibration-test-for-shafting-system
轴系测试程序，多通道输入输出，实现时域、频域、轴心轨迹、瀑布图等功能。(Shafting test program, multi-channel input and output, to achieve time domain, frequency domain, orbit, waterfall and other functions.)
- 2013-06-28 16:20:50下载
- 积分：1
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QC_LDPC译码器的FPGA设计
说明： LDPC码的FPGA实现，用verilog语言编写(FPGA implementation of LDPC code, written in Verilog language)
- 2019-11-15 06:04:33下载
- 积分：1
