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基于FPGA的FFT算法的设计与实现
基于FPGA实现FFT算法,内容包含论文、程序、仿真等等(Implementation of FFT algorithm based on FPGA)
- 2020-07-02 00:00:07下载
- 积分:1
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本程序是用VHDL语言实现电子密码锁功能,整个系统分为三大模块,一为控制模块,二为键盘显示模块,三为处理模块...
本程序是用VHDL语言实现电子密码锁功能,整个系统分为三大模块,一为控制模块,二为键盘显示模块,三为处理模块-This procedure is a VHDL language electronic code lock function, the entire system is divided into three modules, one for the control module, two for the keyboard display module, three modules for the treatment
- 2022-05-08 19:29:46下载
- 积分:1
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ATEREAL EPM1270T144C5N CPLD
基于ATEREAL EPM1270T144C5N CPLD 压力传感器数据采集原码 开发软件 Quartus II -ATEREAL EPM1270T144C5N CPLD-based pressure sensor data acquisition source Quartus II development software
- 2022-02-06 01:07:35下载
- 积分:1
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04_ep2c8_vga_test
VIP FPGA板的配套例子,这个是VGA格式lcd液晶屏幕显示用。(VIP board supporting example of this is the VGA format PREVIEW.)
- 2013-10-18 19:03:37下载
- 积分:1
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veilog code user can derict use it for the base mode.
veilog 代码 用户可以直接调用,作为底层模块。同时已经编译成功,可以作为基本单元库。-veilog code user can derict use it for the base mode.
- 2023-08-09 02:40:03下载
- 积分:1
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QPSK_demod
说明: QPSK的解调程序,采用Verilog编写而成(QPSK demodulation program, written by Verilog)
- 2020-02-29 19:51:38下载
- 积分:1
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seven_lcd
七段数码管显示的时钟程序VHDL代码 ISE编译环境(SEVEN seg VHDL ISE CLOCK)
- 2009-12-08 11:09:15下载
- 积分:1
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rtl
基于脉动结构的有限域乘法器,verilog代码(Based on the pulse of the structure of finite field multipliers, verilog code)
- 2010-01-04 11:48:50下载
- 积分:1
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StopWatch
This is a simple verilog code for stopwatch undre xlinx ISE webpack based for NEXYS3 board.
- 2013-10-04 00:53:49下载
- 积分:1
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Time_setting
时间设置 可以作为设计中的一个小模块进行使用 方便快捷(time setting)
- 2012-03-30 10:12:28下载
- 积分:1