-
uart
说明: uart 发送模块接收模块及tb,其中可以选择不同波特率进行收发,代码带有详细注释。(UART sending module and receiving module)
- 2020-06-20 20:00:02下载
- 积分:1
-
可以在Verilog HDL及其测试代码协议实现
本控制器与博世参考模型测试
- 2022-11-08 00:20:03下载
- 积分:1
-
FIR100
说明: 基于FIR设计的100阶数字滤波器,选择的矩形窗(100 - order digital filter based on FIR)
- 2020-03-06 16:20:41下载
- 积分:1
-
GPS
通过UART在FPGA数码管上显示经纬度坐标的代码(By UART displayed on FPGA digital latitude and longitude coordinates of the code)
- 2015-06-22 17:14:37下载
- 积分:1
-
basic_dff
spartan-3e vhdl fpga 输入用滑动按钮代替 输出用led代替(spartan-3e VHDL fpga input with sliding button instead of the output with led instead)
- 2012-04-23 16:40:17下载
- 积分:1
-
Design and Implementation of the SNMP Agents
A programming language that can decode alpha numeric
- 2018-12-06 10:15:01下载
- 积分:1
-
hidejj
实现线性反馈移位寄存器的verilog实现(lfsr use verilog for the zip)
- 2017-08-02 14:23:12下载
- 积分:1
-
Coding Files
Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double precision multiplier is implemented on a Virtex 6 FPGA. In addition, the proposed design is compliant with IEEE 754 format and handles over flow, under flow, rounding and various exception conditions. The design achieved the operating frequency of 414.714 MHz with an area of 648 slices.
- 2017-12-13 23:58:23下载
- 积分:1
-
32 位超前进位加法器的设计
在本文设计的 32 位携带看超前进位加法器做.the 通过设计 8 4 位共轭亚油酸块降低复杂度。
- 2022-03-23 01:59:34下载
- 积分:1
-
mips 程序
MIPS 处理器程序,出自于《CMOS VLSI Design and Systems Perspective》书中。可以实现LB、SB、RTYPE、BEQ、J指令,仿真测试可以用。
- 2022-01-26 00:53:13下载
- 积分:1