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FPGA_emif
接口模块，通过对高位地址的编码可实现在一个FPGA中配置四个独立的功能模块，每个功能模块具有一个带FIFO的输出口和13个独立的可由DSP读写的寄存器，寄存器功能可自定义。模块还包含两个全局寄存器，可实现全局复位，中断等功能。该模块以应用于实际的项目中，目前运行良好(FPGA to emif)
- 2020-12-04 10:59:26下载
- 积分：1
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I2C verilog 源代码 非常好的代码，大家可以
I2C verilog 源代码 非常好的代码，大家可以-I2C verilog source code for a very good code, we can
- 2022-03-14 16:49:14下载
- 积分：1
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arbitrary data source code generator
任意数据发生器的源代码-arbitrary data source code generator
- 2023-02-11 05:20:03下载
- 积分：1
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cordic_atan
说明： 用verilog语言实现计算反正切函数，在软件无线电中解调PM/FM中使用的尤为频繁。上传的压缩包是modelsim工程，基于6.5c,里边包含一个完整的PM波产生以及解调过程的matlab文件仿真，并取其中间的I和Q支路做为verilog文件的输入，并将其借条输出与MATLAB实际解调输出作比较。
鉴相器的设计基于CORDIC算法，其精度取决于迭代的深度。由于工程实际运用只需要解调出atan值，并不需要绝对的值，所以并没有给予加权，需要的同学可以自己加上。(Calculated using verilog language arc tangent function, the software radio demodulation PM/FM is particularly used frequently. From the archive is modelsim project, based on 6.5c, inside the PM contains a complete demodulation process of wave generation and simulation matlab file, and whichever is the middle of the I and Q branch verilog file as input, and its IOU demodulated output and actual output of MATLAB for comparison. Phase detector design is based on CORDIC algorithm, its accuracy depends on the iteration depth. As the practical application of engineering demodulated atan value only and does not need absolute value, and there is no weight given to the need of the students can add their own.)
- 2010-04-07 16:30:47下载
- 积分：1
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135个经典VerilogHDL源码和说明文档，入门的好资料
135个经典VerilogHDL源码和说明文档，入门的好资料-135 Classic VerilogHDL source and documentation, a good data entry
- 2022-01-20 23:10:53下载
- 积分：1
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dds_test
直接数字式频率合成器DDS设计、Verilog。
产生的信号可以是正弦波或方波、三角波、锯齿波等，自选。
采用DDS技术，将所需生成的波形写入ROM中，按照相位累加原理合成任意波形。
此方案得到的波形稳定，精度高，产生波形频率范围大，容易产生高频。
本实验在设计的模块中，包含以下功能：
（1）通过 freq 信号输入需要的频率的值；
（2）通过 wave_sel 信号选择所需的波形；
（3）通过 amp_adj 信号选择波形放大的倍数。(DDS design of direct digital frequency synthesizer, Verilog.
The generated signal can be sinusoidal or square wave, triangular wave, sawtooth wave and so on, optional.
By using DDS technology, the required waveforms are written into ROM, and arbitrary waveforms are synthesized according to the principle of phase accumulation.
The waveform obtained by this scheme is stable, accurate and easy to generate high frequency waveform.
This experiment includes the following functions in the designed module:
(1) Input the required frequency value through freq signal;
(2) Choosing the required waveform by wave_sel signal;
(3) Select the multiplier of waveform amplification by amp_adj signal.)
- 2019-01-19 16:07:50下载
- 积分：1
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M序列?¨
生成一个M伪随机序列码，在ISE平台上可跑通(Generate an M Pseudo-Random Sequence Code which runs on ISE platform)
- 2019-05-05 15:54:38下载
- 积分：1
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0 2
说明： 基于labVIEW，控制电机等工作实例，程序基本完整(Based on labVIEW, control motor and other working cases, the program is basically complete)
- 2018-01-24 09:09:20下载
- 积分：1
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the program have designed a PCM signal timing modules, including the CLK input,...
该程序设计了一个产生PCM码流时序信号的模块，他包括输入端CLK，SET及输出端Q1,Q2,Q3-the program have designed a PCM signal timing modules, including the CLK input, and output SET Q1, Q2 and Q3
- 2022-02-15 04:03:30下载
- 积分：1
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AD9764
一个AD9764的基于FPGA的驱动，希望对有需要的朋友有所帮助(An AD9764 FPGA-based drive, we want to help a friend in need)
- 2013-09-05 01:48:57下载
- 积分：1
