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nand flash support smdk2410 start recording documents, a detailed description of...
smdk2410 上支持nand flash启动的记录文档,详细描述了从nand flash 启动的过程-nand flash support smdk2410 start recording documents, a detailed description of a nand flash from the start of the process of
- 2023-07-26 13:00:03下载
- 积分：1
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s3c2410的烧片程序,用ads编译,可以通过串口或者jtag口烧写
s3c2410的烧片程序,用ads编译,可以通过串口或者jtag口烧写-s3c2410 the burn unit procedures, using ads compiler, through serial or burning mouth jtag
- 2022-05-23 17:31:54下载
- 积分：1
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C8051f020源程序 对初学者肯定有帮助
C8051f020开发板例程 非常详细 可以直接运行 其中还有各别模块对初学者有帮助的
- 2022-07-24 13:49:32下载
- 积分：1
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最新版IAR511下AT91SAM7S64的USB例程
最新版IAR511下AT91SAM7S64的USB例程-IAR511 under the latest version of the USB routines AT91SAM7S64
- 2022-08-11 20:50:32下载
- 积分：1
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卷积编码和译码过程，维特比译码，含有测试程序
卷积编码和译码过程，维特比译码，含有测试程序-turbo encoder and decoder
- 2022-03-07 14:02:21下载
- 积分：1
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i2c rtl code , document, simulation
i2c rtl code , document, simulation
- 2022-03-22 01:07:49下载
- 积分：1
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led矩阵原理图
led矩阵原理图--Diagram for LED matrix.
- 2022-07-12 12:34:52下载
- 积分：1
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本例的源描述超过了演示版限制的300行,
如果您需要对其进行编译与模拟,请与北京理工大学
ASIC研究所联系,获取Talent系统的完全...
本例的源描述超过了演示版限制的300行,
如果您需要对其进行编译与模拟,请与北京理工大学
ASIC研究所联系,获取Talent系统的完全版本.
联系方法:-The source described in this case than the demo version of the 300 line limit, if you need to be compiled with the simulation, please contact ASIC Institute of Beijing Institute of Technology to obtain the complete version of Talent system. Contact:
- 2022-01-26 00:43:03下载
- 积分：1
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嵌入式系统
s3c2410-各个功能模块开发程序包资料-s3c2410-each functional module development package information
- 2022-06-28 16:17:02下载
- 积分：1
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DE2 练习源码2-2
FPGA DE2开发板 实验2第一部分VHDL硬件语言练习源码
Part II
You are to design a circuit that converts a four-bit binary number V = v3v2v1v0 into its two-digit decimal equivalent
D = d1d0. Table 1 shows the required output values. A partial design of this circuit is given in Figure 1. It
includes a comparator that checks when the value of V is greater than 9, and uses the output of this comparator
in the control of the 7-segment displays. You are to complete the design of this circuit by creating a VHDL entity
which includes the comparator, multiplexers, and circuit A (d
- 2022-05-07 21:56:50下载
- 积分：1
