登录
首页 » Project Design » verilog HDL display module

verilog HDL display module

于 2023-01-04 发布 文件大小:2.77 kB
0 110
下载积分: 2 下载次数: 1

代码说明:

verilog HDL显示模块 verilog HDL显示模块-verilog HDL display module

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 教师工作量计算的源码
    教师工作量计算的源码-teacher workload calculated FOSS
    2023-03-24 17:10:04下载
    积分:1
  • 管理信息系统开发案例,详细介绍了开发流程包含各种要素,可以作为参考。...
    管理信息系统开发案例,详细介绍了开发流程包含各种要素,可以作为参考。-Management information system development case, detailing the development process includes a variety of factors can serve as a reference.
    2022-01-22 14:57:28下载
    积分:1
  • 实现基于CPLD的CCD采集系统设计源码
    实现基于CPLD的CCD采集系统设计源码-CPLD-based design of the CCD acquisition system source
    2022-02-10 14:59:51下载
    积分:1
  • 华为
    华为的内部七号信令培训教材 以及ppt,多媒体教程,学习SS7做好的资料,简单清楚,附带本人的学习总结-Huawei
    2022-02-09 23:58:38下载
    积分:1
  • 本文档详细介绍了电机的pid算法,适合于新手
    本文档详细介绍了电机的pid算法,适合于新手-This document details the motor pid algorithm, suitable for novice
    2022-03-06 23:54:46下载
    积分:1
  • 摘要:基于通信技术的列车运行控制系统(CBTC)是铁路信号的发展方向,交频分复用 OFDM)是一种无线环境下的高速传输技术,它对高速列车控制信息传输中卞要受...
    摘要:基于通信技术的列车运行控制系统(CBTC)是铁路信号的发展方向,交频分复用 OFDM)是一种无线环境下的高速传输技术,它对高速列车控制信息传输中卞要受到的由于多 径传播引起的快衰落所产生的影响有很强的抵抗能力.本文首先介绍了OFDM技术的发展和 基本原理,然后在计算机上用M atlal〕对其性能进行了仿真,仿真中将OFDM与传统的单载波 调制方式―i1,交振幅调制( 1frQAM)对抗多径十扰的性能进行了比较,最后分析了一者的仿真结果. -Abstract: Based on the communication technology train operation control system (CBTC) is a railway signal direction for the development of cross-frequency division multiplexing OFDM) is a wireless environment of high-speed transmission technology, its high-speed train control information transmission Bian be subject to the Due to the spread of multi-path fast fading caused by the impact of a strong resistance to diseases. This paper first introduces the OFDM technology development and the basic principles, and then on the computer〕 M atlal use its performance simulation will OFDM with the traditional single-carrier modulation-i1, cross-amplitude modulation (1frQAM) against multi-path interference of the 10 properties were compared with a final analysis of
    2022-08-24 10:19:13下载
    积分:1
  • mathlab for image processing 2D, DFT, FFT etc.
    mathlab for image processing 2D, DFT, FFT etc.
    2022-03-16 18:40:59下载
    积分:1
  • 一种关于如何制作稳压电源的方法,详细介绍了稳压电源的各个部分,及参数的设计。...
    一种关于如何制作稳压电源的方法,详细介绍了稳压电源的各个部分,及参数的设计。-How to make a regulated power supply on the way, described in detail the various parts of the power regulator, and the design parameters.
    2022-08-17 05:51:13下载
    积分:1
  • 16qam的systerview仿真及fpga实现
    16qam的systerview仿真及fpga实现-16QAM the systerview simulation and FPGA realization of
    2022-07-07 01:45:05下载
    积分:1
  • This article describes a CPLD [1] as the core, VHDL [2] for the development of t...
    本文介绍一种以CPLD[1]为核心、以VHDL[2]为开发工具的时间控制器,该控制器不仅具有时间功能,而且具有定时器功能,能在00:00~23:59之间任意设定开启时间和关闭时间,其设置方便、灵活,广泛应用于路灯、广告灯箱、霓虹灯等处的定时控制。-This article describes a CPLD [1] as the core, VHDL [2] for the development of tools for time controller that features not only has the time, but with the timer function, can be between 00:00 ~ 23:59 arbitrarily set to open time and closing time, and its convenient, flexible, widely used in street lamps, advertising light boxes, neon lights, etc. The timing control.
    2022-02-01 10:40:29下载
    积分:1
  • 696518资源总数
  • 105651会员总数
  • 15今日下载