登录
首页 » VHDL » Viterbi译码器IP核,可以直接编译使用

Viterbi译码器IP核,可以直接编译使用

于 2023-01-24 发布 文件大小:74.26 kB
0 95
下载积分: 2 下载次数: 2

代码说明:

viterbi译码器的IP核,可以直接编译使用-viterbi decoder IP core, the compiler can directly use

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 5
    fpga paper function fff(fpga paper function)
    2010-03-11 23:15:24下载
    积分:1
  • rtl_DRAM
    本程式為使用Verilog語言寫控制DRAM的控制模塊, 可以簡易的控制DRAM IC, 本程式已經過系統驗證.(program for the use of the Verilog language to write the control of DRAM control module, be easy to control DRAM IC, the program has been systematically verified.)
    2006-12-05 11:31:42下载
    积分:1
  • VHDL_COUNTING 时间使用按钮 (Đếm giờ phút giây sử dụng nút nhấn)
    VHDL_COUNTING 时间使用按钮 (Đếm giờ phút giây sử dụng nút nhấn)
    2022-01-27 10:40:51下载
    积分:1
  • mp3decoder
    verilog实现mp3解码程序,包括testbench(mp3 decoder verilog implementation procedures, including the testbench)
    2020-12-31 15:38:59下载
    积分:1
  • quartus-and-modelsim-for-OFDM
    说明:  关于quartus与modelsim 仿真(about quartus and modelsim simulator)
    2011-04-03 18:29:56下载
    积分:1
  • DDSVHDLCODE
    本人收集的多个VHDL语言编写的正弦波发生器以及SPWM程序。(I collected multiple VHDL language of sine wave generator SPWM program.)
    2021-04-06 22:39:02下载
    积分:1
  • cpldfpga
    《CPLDFPGA嵌入式应用开发技术白金手册》源代码,涉及FPGA/CPLD的各个方面,键盘扫描,LED扫描等简单程序及滤波器等的设计(" CPLDFPGA platinum embedded application development technology handbook" source code, related to FPGA/CPLD all aspects of the keyboard scanning, LED scanning filters, such as simple procedures and design)
    2009-04-20 20:59:16下载
    积分:1
  • MIPS_LANG
    说明:  verilog实现misp架构,并且支持modelsim仿真(Verilog implements MISP architecture and supports Modelsim simulation)
    2020-06-18 04:40:02下载
    积分:1
  • 用VHDL编写的8259控制,供大家使用.
    用VHDL编写的8259控制,供大家使用.-with VHDL control of the preparation of the 8259, for your use.
    2023-07-08 01:55:02下载
    积分:1
  • fft_16
    基于FPGA用verilog语言实现16点FFT(16-point FFT FPGA-based verilog language)
    2021-04-18 15:28:51下载
    积分:1
  • 696518资源总数
  • 105547会员总数
  • 4今日下载