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dwgco nnector nnector DWG dwgco连接器
connector DWGco nnector DWGco nnector DWG-connector DWGconnector DWGconnector DWGconnector DWGconnector DWG
- 2022-07-02 23:59:00下载
- 积分：1
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QT2410开发板全部电路图，对做嵌入式硬件设计的朋友会有一定的参考价值。...
QT2410开发板全部电路图，对做嵌入式硬件设计的朋友会有一定的参考价值。-Schematics for QT2410 development board, would be a good reference for those who makes hardware design on embedded system.
- 2022-07-21 12:06:49下载
- 积分：1
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系统分析中的层次分析法以及长江水质评价案例
系统分析中的层次分析法以及长江水质评价案例-system analyse
- 2022-03-16 22:51:22下载
- 积分：1
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教师工作量计算的源码
教师工作量计算的源码-teacher workload calculated FOSS
- 2023-03-24 17:10:04下载
- 积分：1
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this document is very important for vhdl code
this document is very important for vhdl code
- 2022-06-29 21:39:41下载
- 积分：1
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CH372 USB
CH372 USB-UART Chip Specification Document,for reference only
- 2022-04-27 23:41:11下载
- 积分：1
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基于COM_DCOM的组件技术研究与应用
基于COM_DCOM的组件技术研究与应用-COM_DCOM components based on technology research and application
- 2022-01-21 00:30:05下载
- 积分：1
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基于直线的几何不变性标定摄像机参数
Based on a straight
基于直线的几何不变性标定摄像机参数
Based on a straight-line camera calibration parameters of the geometric invariant-Based on a straight-line camera calibration parameters of the geometric invariant
- 2022-02-04 07:12:26下载
- 积分：1
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Wavelets have been widely used in many sign al and image processing applications...
Wavelets have widely been used in many signal and image processing applications. In this paper, a new
serial-parallel architecture for wavelet-based image compression is introduced. It is based on a 4-tap wavelet
transform, which is realised using some FIFO memory modules implementing a pixel-level pipeline
architecture to compress and decompress images. The real filter calculation over 4 ・ 4 window blocks is
done using a tree of carry save adders to ensure the high speed processing required for many applications.
The details of implementing both compressor and decompressor sub-systems are given. The primarily analysis
reveals that the proposed architecture, implemented using current VLSI technologies, can process a
video stream in real time.-Wavelets have been widely used in many sign al and image processing applications. In this p aper. a new serial-parallel architecture for wavele t-based image compression is introduced. It is based on a 4-tap wavelet transform. whic
- 2022-01-25 17:21:14下载
- 积分：1
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在本设计中，我们利用模块化设计方法研制成功一个由超大规模集成电路
组成的高速数字信号处理系统，该系统以TMS320C30为CPU, TMS320C30的突出...
在本设计中，我们利用模块化设计方法研制成功一个由超大规模集成电路
组成的高速数字信号处理系统，该系统以TMS320C30为CPU, TMS320C30的突出
的优点是:能进行浮点运算和60ns的指令周期，所以能更有效的完成各种处理
算法，该系统可以将高速采集的数据经过处理存入PC机，同时也可将数据输出。
该系统具有如下功能:
1、高速数据运算能力TMS320C30指令周期为60ns，每秒执行3300
万次浮点运算，具有单周期双数据读取能力，保证了高速数据处理.
2、数据采集A/D能够对16路模拟信号中的任意一路数据进行采样，对
16路数据分时采样，然后进行实时信号处理。
3, D/A数据转换可完成两路数据信号转换成模拟信号。
4、通讯功能利用标准的RS232C与外部设备进行通讯，实现TMS320C30
与PC机之间通讯。
本文作为一个完整的高速数据采集处理系统，为今后数据采集与处理
提供了一个良好的方法。
- 2022-03-17 18:12:44下载
- 积分：1
