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uart
uart发射机Verilog HDL代码(Verilog HDL code uart transmitter)
- 2011-05-21 21:37:01下载
- 积分:1
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蓝牙接收器,如果你下载这个我会爱你
应用背景一个很长的啊它允许你从终端连接到HC-06蓝牙模块的FPGA接收比特的数据载体关键技术nexys 2VerilogHC-06电缆电子三XilinxISE乔把rar
- 2022-08-03 05:40:12下载
- 积分:1
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forwarding
浙江大学体系结构实验课代码,5级流水线实现旁路和停顿(5-stage pipeline to achieve realization of the bypass pipeline bypass pause 5 pause)
- 2020-09-26 12:07:46下载
- 积分:1
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138
用vhdl 语言实现138译码器,用vhdl 语言实现138译码器,(vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl vhdl )
- 2009-04-21 12:32:17下载
- 积分:1
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turbo_encode
turbo码的编码程序,verilog HDL,在ISE环境中(turbo code encoding process)
- 2014-03-29 15:09:58下载
- 积分:1
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05_key_test
fpga key test 入门 xilinx 黑金的板子(fpga key test xilinx)
- 2017-07-27 09:27:58下载
- 积分:1
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666基于FPGA的MVB2类设备控制器设计_幸柒荣
本文首先对多功能车辆总线的基本原理进行了简要的概述,接着对其实时协议进行了分析,然后对 MVB2 类设备控制器的功能及其功能模块的划分设计进行了详细的分析;最后对各功能模块进行了编程实现,并给出了仿真验证波形。(Firstly, the basic principle of the multifunction vehicle bus are briefly outlined, then analyze the real time protocol, then carried out a detailed analysis of the classification of the design function and the function module of the MVB2 device controller; finally, the function of each module of the program, and gives the simulation waveforms.)
- 2017-10-24 10:57:41下载
- 积分:1
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DE2_CCD_sobel
通过摄像头图像的提取,在FPGA开发板上实现的,主要实现了图像轮廓的提取(Extraction of the image through the camera, in the FPGA implementation of the development board, the main achievement of the image contour extraction)
- 2020-07-22 17:48:45下载
- 积分:1
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vc707-ucf-xdc-rdf0155-rev2-0
vc707 board ucf xdc files
- 2018-06-14 05:50:36下载
- 积分:1
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ISE为开发环境,Verilog语言编写程序
以ISE为开发环境,Verilog语言编写程序。功能:FPGA控制 LCD_1602动态显示秒表(In the development environment of ISE, Verilog language is used to write programs. Function: LCD_1602 dynamic display stopwatch controlled by FPGA)
- 2020-06-20 00:00:02下载
- 积分:1