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8b10b
8b10b编解码,用于光通信和千兆以太网,verilog编写,已验证(8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified)
- 2021-01-27 09:48:41下载
- 积分:1
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awgn511
关于5-11APSK在高斯信道中的误码率分析仿真程序,对具体调制方式及解码方式都有详细的过程(About 5-11APSK in Gaussian channel bit error rate analysis simulation program, has a detailed specific modulation and decoding process)
- 2013-03-31 21:56:28下载
- 积分:1
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基于fpga的dm900a模块
DM9000A简介 主要特点 DM9000A实现以太网媒体介质访问层(MAC)和物理层(PHY)的功能,包括MAC数据帧的组装/拆分与收发、地址识别、CRC编码/校验、MLT-3编码器、接收噪声抑制、输出脉冲成形、超时重传、链路完整性测试、信号极性检测与纠正等。 工作原理 请点击左侧文件开始预览 !预览只提供20%的代码片段,完整代码需下载后查看 加载中 侵权举报
- 2023-01-16 11:05:03下载
- 积分:1
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A402-OutputTFT-LCDDriverICWithPower
文档主要是关于TFT-LCD的相关资料,是有关TFT-lcd芯片的结构与设计理念,对于在这方面学习的朋友有比较大帮助(402 output thinfilm transistorliqu idcrystal display(TFT-LCDdriver integrated circui(ICwith power controlbasedon the number of color stobe displaye disdescribed.
Toachievethistypeofpowercontrol,referencevoltagebuffersare
turnedonandoffaccordingtotheselectednumberofcolors.)
- 2011-08-20 17:08:00下载
- 积分:1
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MAC_TxScheduler
Ethernet MAC-MII interface of Transmit
- 2014-02-15 00:35:25下载
- 积分:1
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SRIO-phy-code
SRIO接口物理层的实现代码,非常复杂,完全自己用verilog编写,支持5G速率,可以作为开发参考(SRIO interface implementation code, the physical is very complex, completely written in verilog, support rate of 5 g, will be helpful to the development)
- 2020-10-01 11:57:42下载
- 积分:1
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Get-20-point
this program get 20 point from user and draw functions.
- 2014-01-09 03:25:06下载
- 积分:1
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dds_rom
基于查找表的DDS的Verilog实现,分为相位累加器模块、ROM模块和顶层DDS模块(Verilog implementation of DDS based on lookup table)
- 2021-03-10 11:19:26下载
- 积分:1
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i2c驱动
i2c驱动程序,分两个模块编写,增加一行代码就可扩展成SCCb协议
- 2022-01-31 07:44:00下载
- 积分:1
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Signal
基于FPGA的DDS相位累加器,连接至存有波形数据的rom后再接至DA可以输出对应的波形(abcdefghijklmnopqrstuvwxyz)
- 2018-05-10 15:19:05下载
- 积分:1