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source
I2C MASTER DESIGNED by Verilog
- 2020-06-18 23:40:02下载
- 积分:1
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sync-and-asyn_FIFO_verilog
同步与异步FIFO的verilog实现,包括源代码,testbench,测试以及综合通过,还有相关参考资料(Synchronous and asynchronous FIFO verilog achieve, including source code, testbench, test and integrated through, as well as related references)
- 2021-03-07 14:19:29下载
- 积分:1
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fifo
fifo是一种先进先出的缓存器,广泛运用在跨时钟域设计,数据缓存中,根据读写可以同步,也可以异步,是一种非常好用的缓存器。
- 2023-08-14 04:10:03下载
- 积分:1
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VHDL-Code-For-Full-Adder-By-Data-Flow-Modelling
VHDL Code For Full Adder By Data Flow Modelling
- 2013-11-08 00:39:04下载
- 积分:1
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master_slave
说明: AXI4-Lite总线的主从机读写,例程及代码(AXI4-Lite Bus Host-Slave Read-Write, Routine and Code)
- 2019-03-22 22:24:20下载
- 积分:1
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sample_tcam.tar
verilog RTL code for simple TCAM
- 2014-06-25 15:50:08下载
- 积分:1
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FPGA按键延时模块 debounce
说明: FPGA按键延时模块,产生key_value和key_flag
可直接例化调用(The key delay module of FPGA)
- 2020-06-22 04:20:02下载
- 积分:1
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11bit_Barker_code
说明: 设计11位巴克码序列峰值检测器,巴克码相关器原理:巴克码相关器能够检测巴克码序列峰值,并且能够在1bits错误情况下检测巴克码序列峰值。(A 11-bit Barker code sequence peak detector is designed. The principle of Barker code correlator is that the Barker code correlator can detect the peak value of Barker code sequence and detect the peak value of Barker code sequence in the case of 1 bits error.)
- 2020-06-21 14:00:01下载
- 积分:1
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ads8361_avl
Interface for ADS8361 TI ADC
IP Core for ALTERA NIOS2
- 2013-04-04 16:12:13下载
- 积分:1
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ac_control
模块 ac_con (输出 heater_on、 cooler_on、 fan_on、 输入的 temp_low、 emp_high、 auto_temp、 manual_heat、 manual_cool、 manual_fan) ;
分配 heater_on = (temp_low & auto_temp) |manual_heat ;
分配 cooler_on = (temp_high & auto_temp) |manual_cool ;
分配 fan_on = (加热器上 | cooler_on | manual_fan;
endmodule
- 2023-06-27 10:00:02下载
- 积分:1