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作者：新舜唐日期：2008
--author: Suntion Tang
--date: 2008-6-7
-- two warning
--modify: By Suntion Tang at 2008-6-14
--description: 顶层文件，由于此系统简单，
-- 且底层文件不多，故放弃原理图描述，采用VHDL语言描述-author: Suntion Tang date: 2008-6-7 two warning modify: By Suntion Tang at 2008-6-14 description: the top-level documents, as a result of this system is simple, and not more than the bottom of a document, they give up the schematic description of the use of VHDL language description
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- 积分：1
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JOP kernel, which is the core of the core, the Chinese can not find basic inform...
JOP的内核文件，这是核心的核心，中文资料基本找不到-JOP kernel, which is the core of the core, the Chinese can not find basic information
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7。对于输入密码锁的关键，假设七个林后重置…
7对于进入密码锁的按键，假设复位后七个灯显示" 0"，而使用sw5、sw6 2，则只要按下并松开sw5后七个灯就显示" 5"，而只要按下并松开sw6，七个灯就正确显示值" 6
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bhas
this is a vhdl program...
- 2013-08-17 23:30:56下载
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In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Ver...
在Altera芯片2C35F672平台上的FFT程序，采用DSPBuilder5.0，生成Verilog文件。开发环境：QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
- 2022-03-16 05:08:13下载
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100_Power_Tips_for_FPGA_Designersi
fpga高手设计实战真经100则,最新的FPGA英文书籍，值得参考学习(100 Power Tips for FPGA Designers，The new FPGA English books, worth learning)
- 2013-12-06 19:40:43下载
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用Verilog HDL实现I2C总线功能，对I2C总线有很大帮助
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- 2022-06-01 23:07:46下载
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4个7段lcd同时显示的程序，已经在digilent的nexy2板上通过验证，非常好用易懂，适合初学者学习...
4个7段lcd同时显示的程序，已经在digilent的nexy2板上通过验证，非常好用易懂，适合初学者学习-display 4 leds
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CPU-Verilog
简单流水线CPU，使用 verilog实现，实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)
- 2020-06-23 19:40:01下载
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AD9957
ad9957的资料，内含有命令字生成器，适合使用该芯片的开发人员(ad9957 data, contains the command word generator for developers using the chip)
- 2011-10-27 22:06:55下载
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