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FPGA 蜂鸣器
1. 蜂鸣器实验
(1) 频率设定
音乐来自震动,为了区别音调,需要有不同的震动频率。制作一个最底层的变频器,依据传入的分频值从100MHZ分频至相应音调的震动频率,将这一震荡信号接到蜂鸣器。
为了标志低中高
- 2022-02-13 05:59:25下载
- 积分:1
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elc_clock
verilog实践 elc_clock 电子时钟设计(Verilog design practice elc_clock electronic clock)
- 2008-12-10 16:06:48下载
- 积分:1
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at7_ex04
通过LED闪烁控制器的代码,使用Vivado工具配置定义一个IP核,在用户工程中可随意添加这个IP核作为设计的一部分,如同Vivado自带的IP核一样方便调用和集成。(Through the code of the LED scintillation controller, the Vivado tool is configured to define a IP core, and the IP kernel can be added as part of the design at random in user engineering. It is as convenient to call and integrate as the IP kernel with Vivado.)
- 2018-04-09 18:41:52下载
- 积分:1
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Verilog RS232代码
Verilog RS232代码, 分为三个模块,时钟产生模块,发送数据模块,接收数据模块。
整个工程的功能是,你从串口上位机发送什么数据,串口就将该数据重新发送回上位机
- 2023-02-16 19:05:04下载
- 积分:1
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zhentongbu_VerilogHDL
帧同步的VHDL程序源代码,巴克码同步实现。(Frame synchronization of the VHDL source code, Barker code synchronization)
- 2012-05-26 19:35:40下载
- 积分:1
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DFT
说明: DFT FPGA实现,simulink到vivado(DFT FPAG implement base on simulink and HLS)
- 2020-09-22 18:08:58下载
- 积分:1
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Key-200893142940130
说明: 关于地铁售票的一些功能 基于自动买票的VHDL设计程序 比较经典(Subway ticket on some of the features of the VHDL-based auto-buying classic design procedure)
- 2008-10-07 18:16:54下载
- 积分:1
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xapp1161
多相滤波系统的设计与实现,有MATLAB仿真程序,有sysgen的系统仿真,还有VHDL代码,其中还有FIR的系数参数等等(Polyphase filter system, the design and implementation includes a MATLAB simulation program, sysgen system simulation, and VHDL code, including FIR coefficient parameters, and so on
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- 2021-02-15 17:29:47下载
- 积分:1
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lacp
lacp代码,可以参照学习Lacp协议的相关状态机等知识(LACP code, can refer to the relevant state machine learning knowledge of Lacp protocol)
- 2014-12-09 17:14:11下载
- 积分:1
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61EDA_C2212
红色飓风II开发板USB2FPGA USB驱动程序,由verilog编写,包括源码和FIFO测试程序(Red Hurricane II development board USB2FPGA USB driver from verilog preparation, including source code and test procedures FIFO)
- 2013-05-30 14:22:07下载
- 积分:1