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ds190-Zynq-7000-Overview
zedboard的资料说明书，可以帮助你理解(zedboard data sheets, can help you understand)
- 2012-11-06 10:51:14下载
- 积分：1
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本例为电子琴VHDL程序原代码,电子琴,可实现基本功能
本例为电子琴VHDL程序原代码,电子琴,可实现基本功能-In this case the procedures for organ VHDL source code, organ, can realize the basic functions of
- 2022-03-23 15:59:38下载
- 积分：1
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codelock
说明： 用VHDL实现密码锁功能，用状态机实现，分管理员和用户两种功能，可分别修改密码，重置密码等。(codelock，VHDL，state)
- 2010-03-19 13:32:14下载
- 积分：1
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FPGA
基于FPGA的I2C程序0001,很不错的论文及程序，，大家快下啊-FPGA-based procedures I2C 0001, a very good paper and procedures, we quickly under ah
- 2022-08-17 00:37:15下载
- 积分：1
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UART_real_time_clock
This is an UART real time clock
- 2009-06-07 01:21:41下载
- 积分：1
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lab_instructions3
The objective of the labs today is to give you a basic understanding of FPGA design and
enough experience to begin your own FPGA design with the ISE 10.1 tools and the
Xilinx Spartan-3A DSP 1800A Starter Kit.
- 2010-12-31 17:16:42下载
- 积分：1
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SineGen
Basic VHDL code to create a sine wave generator for an FPGA board.
- 2014-01-24 01:04:15下载
- 积分：1
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基于VHDL语言的循环码编码器的程序，以一个（15，6）循环码为例...
基于VHDL语言的循环码编码器的程序，以一个（15，6）循环码为例-VHDL language based on the cycle of the program code encoder to a (15,6) cyclic code as an example
- 2022-03-13 14:13:18下载
- 积分：1
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基于MAX2运用Quartus实现串口通信
基于MAX2运用Quartus实现串口通信-MAX2-based use of Quartus Serial Communication
- 2022-04-09 03:43:20下载
- 积分：1
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AN66806
提供了利用 GPIF 对 FX2LP 与同步 FIFO CY7C4625-15AC 之间的接口进行设计的源代码(Provides for the use of GPIF FX2LP and synchronization FIFO CY7C4625-15AC to design the interface between the source code)
- 2013-08-13 14:42:55下载
- 积分：1
