-
hamming_encodeadecode
用Verilog语言编写的对m序列进行汉明码编译码的程序。具体实现为产生m序列后对其进行(7,4)汉明码编码并加错,然后将其纠错译码并输出,详细过程见仿真。(Written by Verilog m sequence of procedures for coding and decoding Hamming codes. Concrete realization of m sequence to produce its (7,4) hamming code and a mistake, and then error correction decoding and output, see the detailed process simulation.)
- 2011-04-22 16:46:39下载
- 积分:1
-
FPGA-matrix
任意维数矩阵求逆的fpga实现,矩阵求逆是矩阵运算中最重要且最难实现的一种运算(fpga implementaion of matrix inverse of any dimension)
- 2014-09-30 20:07:51下载
- 积分:1
-
uart766
---实现的部分VHDL 程序如下。
--- elsif clk1x event and clk1x = 1 then ---if std_logic_vector(length_no) >= “0001” and std_logic_vector(length_no) <= “1001” then -----数据帧数据由接收串行数据端移位入接收移位寄存器---rsr(0) <= rxda --- rsr(7 downto 1) <= rsr(6 downto 0) --- parity <= parity xor rsr(7) --- elsif std_logic_vector(length_no) = “1010” then --- rbr <= rsr --接收移位寄存器数据进入接收缓冲器--- ...... --- end if(--- achieve some VHDL procedure is as follows.--- Elsif clk1x event and then a clk1x = s--- if td_logic_vector (length_no))
- 2007-06-02 12:44:31下载
- 积分:1
-
简单的CPU(源代码和合成脚本)
应用背景此文件包含所有的源代码和脚本,以Altera公司的简单CPU的合成。500MHz时钟设计运行。 ;关键技术使用CLA提高速度的设计。这只是一个简单的CPU,它的结构很简单,它没有任何管道或类似的东西。
- 2022-04-30 14:14:37下载
- 积分:1
-
jk-filpflop
这个是vhdl中很常见的jk filpflop的文件只用于很小数位的变化 其中的jk文件是up down运算都符合的(This is a very common vhdl jk filpflop file is only used for very small changes in a digital file which jk is up down operations are met)
- 2013-11-19 11:43:07下载
- 积分:1
-
i2c_master_ip_for_nios
i2c master ip for altera nios, add in qsys
- 2018-03-02 14:50:44下载
- 积分:1
-
VGA
说明: 用VERILOG编写的一个可以实现VGA显示的程序.....(Prepared using a VERILOG VGA display program can .....)
- 2011-03-04 12:25:21下载
- 积分:1
-
41_eth_ddr3_lcd
说明: “基于 ROM 的 LCD图片显示实验 ”中利用 FPGA 片上存储资源存储图片,并通过 LCD接口将图片显示到 LCD屏幕上。但是由于 FPGA 片上存储资源有限,只能存储分辨率较小的图片(In the experiment of LCD image display based on ROM, FPGA on-chip storage resources are used to store pictures, and the pictures are displayed on LCD screen through LCD interface. However, due to the limited on-chip memory resources of FPGA, it can only store images with smaller resolution)
- 2021-03-21 00:33:00下载
- 积分:1
-
ahb_sramc_svtb
ahb总线Verilog代码及sv仿真文件(ahb bus Verilog code and sv simulation code)
- 2021-05-14 14:30:02下载
- 积分:1
-
DW_apb_rtc
verilog实现RTC功能,可直接用于芯片开发中。(verilog achieve RTC function can be directly used for chip development.)
- 2020-12-28 16:49:01下载
- 积分:1