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GetCPU
动态获取CPU使用率源码 可以加到压力测试里(Dynamic access to CPU use the source code
)
- 2014-06-28 18:56:23下载
- 积分:1
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fpga
Once the FPGA is located, the rest of the mapping data for the other components can be determined dynamically its section mapping registers.
- 2015-11-05 20:55:50下载
- 积分:1
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fft64
verilog hdl 编写的64点fft代码,适合很多芯片(coded by verilog hdl that implement 64 point fft, suite to many core)
- 2020-12-12 21:19:16下载
- 积分:1
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RISC
URISC的RTL级设计,Verilog代码(Design: URISC RTL Verilog)
- 2019-06-16 23:07:39下载
- 积分:1
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sinewave_FPGA
数字载波发生器,产生一个正弦波,工程中的所有模块都经过测试并运行没有任何问题,而且利用逻辑分析仪对每个模块的输出都进行了逻辑测试。并经过D/A转换得到了正弦波波形,但唯一的缺点是没有滤波器,如果有人想看标准正弦波,可以自制一个简易低通滤波器进行观看,如有不清楚的地方可以把问题发到我的邮箱jiangguoqian@126.com一起探讨研究。(sinewave)
- 2010-08-23 19:42:07下载
- 积分:1
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adc_cfg
adc器件ads62p49配置代码,已在工程中验证可用(Temperature sensor DS18B20 parses the code, has verified the ADC device configuration code, has been verified available)
- 2020-11-04 16:29:51下载
- 积分:1
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Micron_SDRAM_DDR2Simulation_model_Verilog
DDR2 SDRAM仿真模型,适合于ModelSim下工作,请先阅读readme(DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.)
- 2020-10-29 17:49:57下载
- 积分:1
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pprobar
ES A PRACRICA 2 DEL LABORATORIO DE DIGITAL
- 2013-12-09 04:26:42下载
- 积分:1
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lcd
1602是目前最常用的显示器件,本例是通过verilog 代码实现1602的显示(1602 display)
- 2011-01-04 14:10:31下载
- 积分:1
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USB2.0的VHDL描述,很经典了,欢迎大家下载
USB2.0的VHDL描述,很经典了,欢迎大家下载-USB2.0 the VHDL description, very classic, and welcomes everyone to download
- 2023-04-17 09:30:03下载
- 积分:1