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Chapter11-13
第十一章到第十三章的代码
本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。(Chapter XI to the 13th chapter of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.)
- 2009-11-17 13:57:09下载
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Coding Files
Floating Point FP multiplication is widely used in large set of scientific and signal processing computation. Multiplication is one of the common arithmetic operations in these computations. A high speed floating point double precision multiplier is implemented on a Virtex 6 FPGA. In addition, the proposed design is compliant with IEEE 754 format and handles over flow, under flow, rounding and various exception conditions. The design achieved the operating frequency of 414.714 MHz with an area of 648 slices.
- 2017-12-13 23:58:23下载
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vga_strip_caitiao
vga 测试代码，可以显示任意彩条，棋盘，花纹(VGA test code, can display any color bar, chess board, decorative pattern
)
- 2014-08-29 12:54:07下载
- 积分：1
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阶梯波程序
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY ladder IS
PORT(clk,reset:IN STD_LOGIC;
- 2023-07-31 13:05:03下载
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1 前大灯可以随意打开和关闭；
2 当汽车左转弯的时候，前左转向灯闪烁，同时左后灯的3盏灯由右往左闪烁；
3 当汽车有转弯的时候，前右转向灯闪烁，同时右...
1 前大灯可以随意打开和关闭；
2 当汽车左转弯的时候，前左转向灯闪烁，同时左后灯的3盏灯由右往左闪烁；
3 当汽车有转弯的时候，前右转向灯闪烁，同时右后灯的3盏灯有左往右闪烁；
4 当汽车减速或紧急刹车的时候，左后灯和右后等同时闪烁；
5 当汽车在左转弯的同时减速，则前左转向灯闪烁，左后灯的3盏灯由右往左闪烁，同时右后灯都点亮。
6 当汽车在左转弯的同时减速，则前右转向灯闪烁，右后灯的3盏灯有左往右闪烁，同时左后灯都点亮。
-a former headlamps can be opened and closed at will; 2 when the vehicle made a left turn when the former left to lights flickered. Left lights while the three lights flashing from right-go left; 3 when the vehicle is making a turn when a right turn to the former lights flickered. Right after the lights while the three lights are blinking right and left; 4 when the vehicle deceleration or when the emergency brake, Left and right after the lights blink, and so on; 5 when the vehicle made a left turn at the same time to slow down, and then to the left before the lights flickered. Left lights three lights flashing from right-go left, right after the lights are lit. 6 when a car made a left turn at the same time to slow down, and then right before the lights to flick
- 2022-03-04 04:27:43下载
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此示例是8051核加频率计的联合设计,带有8051IP核资料
此示例是8051核加频率计的联合设计,带有8051IP核资料-This example is the 8051 nuclear increase the frequency of joint design, with the nuclear information 8051IP
- 2022-06-14 22:57:42下载
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七分频数字电路—VHDL
本程序描述了七分频数字电路，程序经过仿真，可以使用。该程序的设计方法为常用的奇数分频设计方法，简单易懂，具体方法描述网上很多，此外设计其他类似的奇数分频电路时，可以直接改动程序中相应的参数即可。文件中工程已经建好，可以用quartus II直接打开
- 2022-05-22 00:15:00下载
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基于FPGA的VHDL可以产生不同的音调,象音乐一样
基于FPGA的VHDL可以产生不同的音调,象音乐一样-based FPGA VHDL can produce different tones, like the same music
- 2022-12-09 14:55:02下载
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2011-diansai-E
2011年 电赛 E题 简易数字信号传输性能分析仪FPGA信号发生部分 包括m序列，伪随机序列，曼彻斯特编码 程序 和单片机部分程序(2011 CEC E title simple digital signal transmission performance analyzer FPGA signal part of the program and single-chip part of the program)
- 2012-02-23 10:11:07下载
- 积分：1
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sm4_Verilog
sm4 VERILOG 代码实现及其在无线网络3G中的应用(sm4 VERILOG)
- 2020-08-11 20:58:27下载
- 积分：1
