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AD9957
ad9957的资料,内含有命令字生成器,适合使用该芯片的开发人员(ad9957 data, contains the command word generator for developers using the chip)
- 2011-10-27 22:06:55下载
- 积分:1
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nor_flash_core
Verilog实现的NOR FLASH控制器,基于M25P128开发,功能完整,简洁易懂,自用无问题。(Verilog implementations NOR FLASH controller, based M25P128 development, full-featured, easy to read, for personal use, no problem.)
- 2021-03-09 14:09:27下载
- 积分:1
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verilog 语言实例,对于新手学习有很大帮助的实例
verilog 语言实例,对于新手学习有很大帮助的实例-Examples of Verilog language, the novice has to learn very helpful examples of
- 2022-07-13 04:50:37下载
- 积分:1
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数字频率计毕业论文 不是自己做的
数字频率计毕业论文 不是自己做的-Digital Cymometer thesis do not own. . Ha ha
- 2023-05-02 09:30:02下载
- 积分:1
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High
高速多通道crc实现,可以并行实现5个通道数据的校验,支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard
- 2022-07-18 13:13:37下载
- 积分:1
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fft
FPGA实现FFT算法的源代码及工程文件,此工程为ISE工程项目。有详细的说明,可以运行。(FPGA Implementation of FFT algorithm source code and project files, this works for the ISE project. There are detailed instructions, you can run.)
- 2013-10-12 17:21:32下载
- 积分:1
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FPGAshixu
FPGA经验总结:时序是设计出来的
我们在做详细设计的时候,对于一些信号的时序肯定会做一些调整的,但是这种时序的调整最多只能波及到本一级模块,而不能影响到整个设计。(FPGA Experience: Timing is designed to do the detailed design of our time, for some signal timing will certainly make some adjustments, but adjust this timing can only spread to up to this level of the module, but not affect the whole design.)
- 2015-03-13 10:27:51下载
- 积分:1
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利用FPGA实现的脉宽测试技术,基于VHDL,测试误差为时钟周期
利用FPGA实现的脉宽测试技术,基于VHDL,测试误差为时钟周期-Use of FPGA technology to achieve the pulse-width test, based on VHDL, test error of clock cycles
- 2022-06-26 11:28:29下载
- 积分:1
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xilinx 开发板原程序,双口RAM控制
xilinx 开发板原程序,双口RAM控制-Xilinx development board the original procedures, dual-port RAM control
- 2022-07-26 06:17:10下载
- 积分:1
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ROM模块,功能在于,是创建一个简易的rom模块
ROM模块,功能在于,是创建一个简易的rom模块-rom
- 2022-03-31 16:48:46下载
- 积分:1