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ht66f0185-1
小家电常用芯片HT66F0185的UART 使用例子，已在产品使用(Small appliances commonly use UART chip HT66F0185 of example, has been used in products)
- 2020-10-09 16:27:34下载
- 积分：1
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6_Sets_of_8051_VHDL_Verilog
it has 6 packages of 8051 sources,including source code(VHDL and Verilog),dc scripts, pdfs, netlists etc. and a MIPS IP package
- 2012-07-02 10:56:02下载
- 积分：1
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STM32F103ZEt6_NORFlash
1、FSMC全称是静态存储控制器，用来高速操作外部SRAM，NOR，NAND等，广泛用来驱动LCD
MCU的FSMC配置在fsmc_nor.c，你也可以查阅相关资料。
2、此例程通过读写外部M29W128，熟悉FSMC的配置以及操作。(1, FSMC stands for static memory controller for high-speed operation of external SRAM, NOR, NAND, widely used to drive the LCD MCU FSMC configuration in fsmc_nor.c, you can also access to relevant information. This routine by reading and writing external M29W128 familiar with the configuration and the operation of the FSMC.)
- 2012-11-26 11:08:20下载
- 积分：1
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二进制神经网络（BNN）bnn-fpga-master
说明： bnn-fpga是FPGA上CIFAR-10的二进制神经网络（BNN）加速器的开源实现。 加速器针对低功耗嵌入式现场可编程SoC，并在Zedboard上进行了测试。 在编写CIFAR-10测试集中的10000张图像时，错误率是11.19％。(bnn-fpga is an open-source implementation of a binarized neural network (BNN) accelerator for CIFAR-10 on FPGA. The architecture and training of the BNN is proposed by Courbarieaux et al. and open-source Python code is available. Our accelerator targets low-power embedded field-programmable SoCs and was tested on a Zedboard. At time of writing the error rate on the 10000 images in the CIFAR-10 test set is 11.19%.)
- 2020-07-27 07:02:34下载
- 积分：1
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codes
EKG SIGNAL PROCESSING THROUGH CORDIC
- 2013-09-29 01:46:17下载
- 积分：1
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modified_booth_multiplier
quartus ii项目文件包，功能是改进的booth乘法器，节省时钟，已完成仿真。(This zip file contains a quartus ii project, which can fufill multiple function. It is done by using a modified booth multiplier.)
- 2018-01-11 18:35:04下载
- 积分：1
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加减法器
可实现两个4bit补码的加法及减法，有溢出提示(adder with overflow hint)
- 2017-07-19 20:52:42下载
- 积分：1
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系统设计
说明： 基于旋转编码器和LED灯组的强度调节系统设计(Design of Intensity Regulation System Based on Rotary Encoder and LED Lamp Set)
- 2020-06-21 02:00:01下载
- 积分：1
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EDA
EDA技术及其应用《序列信号发生器的设计》，包括源文件。(EDA technology and its applications " sequence signal generator design, including source files.)
- 2012-10-29 18:30:40下载
- 积分：1
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FPGA_正反_可变步长_计数器
实现了一个3-10步长可变，正反向计数器，已在Spartan3E 250板子上成功实现
- 2022-02-02 19:14:18下载
- 积分：1
