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pong_C5H
FPGA的经典例程，可以进行移植和借鉴使用(FPGA' s classic routines, can be transplanted and learn to use)
- 2011-07-23 10:15:41下载
- 积分：1
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UDP_Core
本人用verilog编写的UDP协议，经测试可用。(I am prepared to use verilog UDP protocol, the test is available.)
- 2021-04-05 04:39:03下载
- 积分：1
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digital-PLL
收集的关于数字锁相环的理论模型和分析讨论，适用于FPGA的数字电路设计。(Theoretical models and analysis and discussion about digital PLL collected for FPGA-based digital circuit design.)
- 2015-02-11 10:39:31下载
- 积分：1
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Audio Codec
这是用altera的DE2-115做的，藉由各種播放軟體 这是用altera的DE2-115做的，藉由各種播放軟體 这是用altera的DE2-115做的，藉由各種播放軟體 这是用altera的DE2-115做的，藉由各種播放軟體
- 2022-02-22 11:00:49下载
- 积分：1
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P4 (3)
支持{addu、subu、lui、ori、jal、jr、lw、sw、nop}指令集的单周期CPU，verilog硬件描述语言实现(Support {addu, subu, lui, ori, jal, jr, lw, sw, nop} instruction set of one-cycle CPU, Verilog hardware description language implementation)
- 2018-12-02 17:22:40下载
- 积分：1
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I2C
K2FPGA开发板实验教程——I2C协议说明及verilog实现读写I2C器件，中文内涵代码，验证可用。(K2FPGA development board test tutorial- I2C protocol description and verilog read and write I2C devices, Chinese connotation code to verify availability.)
- 2014-03-28 16:37:59下载
- 积分：1
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emif2axi_v1_00_a
说明： emif接口转axi接口，在多个项目中使用，功能完善(EMIF interface to Axi interface, used in many projects, perfect function)
- 2020-12-01 15:29:26下载
- 积分：1
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z_max_spwm
Z源逆变器简单升压模拟仿真。调制方式为SPWM，通过设置三角波幅值和比较电压，即可调节输出电压。(Z-source inverter simple step-up simulation. Modulation mode SPWM, by setting the the triangle amplitude and the comparison voltage to regulate the output voltage.)
- 2020-11-02 19:09:53下载
- 积分：1
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FloatPoint Arithmetic
Float Point Add, Multiply, and Divide arithmetic. You can change and modify the add block and reuse it in FPGA or ASIC chip. The running clock is dependent of the technology you used in the ASIC.
- 2022-06-13 03:38:57下载
- 积分：1
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vga_driver
verilog语言设计的VGA驱动。在Quarus11.0下编译成功，并在Altera cyclone4开发板上测试OK(verilog language design VGA driver. In Quartus11.0 successfully compiled and Altera cyclone4 development board test OK)
- 2016-05-25 17:19:18下载
- 积分：1
