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EP2C70F896C6N-pins
将VHDL程序下载到DE2开发板,引脚分配时需要知道的芯片每个引脚功能(VHDL program will be downloaded to the DE2 development board, you need to know when the pin assignments for each pin of the chip functions)
- 2020-12-09 11:09:21下载
- 积分:1
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ZEDBOARD
ZEDBOARD的管脚分配图和约束文件,包括PCB图和xdc文件(Pin assignment of ZEDBOARD)
- 2021-03-23 21:19:15下载
- 积分:1
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SHIN12-HJCS
每次开机都将次数加1 并存储到EEPROM。这样就能直观的看到机器的使用次数
用P1口 LED做为显示,次数大于256是将溢出,按复位模拟开机 或者直接通过开关开机(Each boot will add a number of times and stored to the EEPROM. So you can visually see the frequency of use of the machine as with P1 port LED display, the number is greater than 256 will overflow, analog power or press the reset switch power directly through)
- 2013-06-13 21:03:46下载
- 积分:1
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FPGA开发全攻略
FPGA设计攻略及流程,包含时序收敛和引脚约束(FPGA design strategy and process, including time series convergence and pin constraints)
- 2017-12-12 16:30:52下载
- 积分:1
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masera2017
fpga hardware hevc implementation
- 2018-08-06 01:26:57下载
- 积分:1
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ADC-Parameter
外部ADC采集数据,存为数组文件。通过程序读入,然后即可求出ADC的SNR、SINAD、THD、ENOB等。(External ADC data collection, stored as an array of documents. Read through the program, then the ADC SNR, SINAD, THD, ENOB can be calculated.)
- 2021-03-15 21:39:22下载
- 积分:1
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tlc5615
TLC5615串行DA的驱动接口,采用verilog编程(TLC5615 driver DA serial interface using verilog programming)
- 2009-04-27 11:59:22下载
- 积分:1
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stop_watch
采用Quartus2编写的电子秒表电路
实现计时、暂停等功能(Quartus2 prepared using electronic stopwatch timer circuit, suspension and other functions)
- 2008-04-27 13:04:03下载
- 积分:1
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OFDM_CP
ofdm系统的matlab实现,包括插入导频信号和循环前缀(Matlab implementation of ofdm system, including inserted pilot frequency signal and the cyclic prefix)
- 2013-05-29 10:10:23下载
- 积分:1
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IC设计流程和设计方法
IC的设计可以分为两个部分,分别为:前端设计(也称逻辑设计)和后端设计(也称物理设计),这两个部分并没有统一严格的界限,凡涉及到与工艺有关的设计可称为后端设计。(The design of IC can be divided into two parts: front-end design (also called logic design) and back-end design (also known as physical design). These two parts do not have a uniform and strict boundary, and the design related to process can be called back-end design.)
- 2020-07-01 23:00:02下载
- 积分:1