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step-motor
how to use step motor
control
- 2013-02-04 13:12:25下载
- 积分：1
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HDB3-encoderauncoder
HDB3编码器与解码器，以及RTL图，使用Verilog HDL实现(HDB3 encoder and decoder, and RTL diagram, use Verilog HDL to implement)
- 2014-12-14 13:17:26下载
- 积分：1
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Cyclone-V-GX-开发板原理图-(5CGXFC5C6F27), Audio,HDMI 部分Demo
开发板的原理图 Aduio和 HDMI 是开发板自带的Demo。Schematic of Cyclone V and official demostration about HDMI and Audio.
- 2022-10-19 07:15:03下载
- 积分：1
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nv04_context
The description header can be found in signal_processing_library.h.
- 2015-07-17 09:36:41下载
- 积分：1
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[verilog]dcfifo_256x32
双时钟域FIFO(This is self-defined Dual-Clock FIFO, using logic lut resources.
Dual-Clock FIFO,
Depth: 256
Width: 32
USEDW: Y
FULLL:Y
EMPTY:Y)
- 2017-05-10 13:25:41下载
- 积分：1
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FifoinFIFO
systemc实现的一个fifo，对想要学习systemc的同学很有帮助哦(A fifo systemc achieved, the students want to learn systemc helpful oh)
- 2021-04-18 00:28:52下载
- 积分：1
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DDS-Waveform-generator
采用FPGA实现的DDS波形发生器源码，可以实现频率幅值变换、正弦波、方波、三角波输出，输出频率可达1MHz(FPGA implementation of the DDS waveform generator source frequency amplitude transform, sine wave, square wave, triangle wave output, the output frequency up to 1MHz)
- 2012-06-29 23:20:58下载
- 积分：1
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QDPSKvhd
说明： 基于quartusII的QDPSK调制解调vhdl程序。(Modulation and demodulation based quartusII of QDPSK vhdl program.)
- 2010-04-23 17:30:53下载
- 积分：1
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datamapping
Verilog实现数据映射，解决CPM调制中的比特流向符号的转化(Implement of data mapping with Verilog)
- 2021-03-15 16:29:22下载
- 积分：1
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prj_ex_5
自动化仿真平台的搭建使用代码，经过具体的仿真和优化，发现代码完全可用(The automated simulation platform is built using code, and after specific simulation and optimization, it is found that the code is fully available)
- 2017-09-21 15:11:33下载
- 积分：1
