-
computer software qualification level examination papers Collection, 1997
计算机软件资格水平考试试题集锦,包含了1997-2003年的上下午试题,可供程序员参考。-computer software qualification level examination papers Collection, 1997-2003, contains the afternoon exam for a programmer"s reference.
- 2022-10-28 21:50:03下载
- 积分:1
-
好用经典滑门喜欢的 朋友下,我 也是搜集
以后接着上传经典网站程序...
好用经典滑门喜欢的 朋友下,我 也是搜集
以后接着上传经典网站程序-Easy to use the classic sliding door like a friend, I also collect classic site after the procedure and then upload
- 2022-03-11 11:14:09下载
- 积分:1
-
关于AVS的一些学习资料,适合初学者的比较好的学习笔记。
关于AVS的一些学习资料,适合初学者的比较好的学习笔记。-Some matierials for beginners.
- 2022-10-20 18:25:04下载
- 积分:1
-
《数据结构(c语言版)》配套光盘 学习数据库不可缺少的辅助材料...
《数据结构(c语言版)》配套光盘 学习数据库不可缺少的辅助材料 -err
- 2023-05-11 18:10:03下载
- 积分:1
-
通过对ANSI转义序列支持终端的实现。这个...
通过实现对 ANSI 的终端转义序列的支持.这个应用程序还更好地利用了 MIDP 的用户界面功能,并具有对用于用户输入的键盘和定制窗体的支持。您可以组合和匹配这些软件组建来为新的种类的网络意识(network-aware)移动应用程序提供基础。-through the realization of the right ANSI terminal escape sequences support. The application also to make better use of the MIDP user interface functions, and features for user input to the keyboard and Custom Window support. You can mix and match software to the formation of new types of network awareness (network-aware) mobile applications provide the infrastructure.
- 2022-10-28 19:25:03下载
- 积分:1
-
专家来告诉你如何进行网站项目的开发控制与管理
专家来告诉你如何进行网站项目的开发控制与管理-experts to tell you how to conduct site project development and management control
- 2022-10-01 02:25:03下载
- 积分:1
-
让你了解office的编码规则,可供编码时进行参考
让你了解office的编码规则,可供编码时进行参考-office let you know the coding rules, codes for reference when
- 2022-01-25 19:40:12下载
- 积分:1
-
属于数学建模课件。对初学者了解数学有一定的帮助。
属于数学建模课件。对初学者了解数学有一定的帮助。-Belongs to mathematical modeling courseware. For beginners, there is a certain understanding of math help.
- 2022-01-31 20:31:00下载
- 积分:1
-
FPGA pipelined designs on paper This work investigates the use of very deep pipe...
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
compliant 32-bit floating-point multiplier. We show how to
write VHDL cells that implement such approach, and how
the array multiplier architecture was adapted. Synthesis
and simulation were performed for Altera Apex20KE
devices, although the VHDL code should be portable to
other devices. For this family, a 16 bit integer multiplier
achieves a frequency of 266MHz, while the floating point
unit reaches 235MHz, performing 235 MFLOPS in an
FPGA. Additional cells are inserted to synchronize data,
what imposes significant area penalties. This and other
considerations to apply the technique in real designs are
also addressed.-FPGA pipelined designs on paper This work invest
- 2022-11-28 12:05:03下载
- 积分:1
-
此文章为vb的条码编程详细介绍及具体的编程实例
此文章为vb的条码编程详细介绍及具体的编程实例-This article for barcode vb programming details and specific examples of programming
- 2022-03-09 21:27:44下载
- 积分:1