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sha1
利用verilog语言实现了SHA-1机密算法,具体算法与加密芯片ds28e01一致。(Using Verilog to achieve the SHA-1 secret algorithm, the specific algorithm is consistent with the encryption chip ds28e01.)
- 2020-11-08 08:49:47下载
- 积分:1
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modulationshaped
基带数字信号通过成形滤波(选用升余弦滚降函数)然后进行载波调制(Base-band digital signal through the shaping filter (raised cosine roll-off optional function) and then proceed to carrier modulation)
- 2007-10-31 15:27:18下载
- 积分:1
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dianzhen(ok)
驱动8*8点阵块显示汉字,可以自己根据要显示的内容随意更改,已通过验证。(Blocks of 8* 8 dot matrix drive display Chinese characters, you can display the content according to their random changes, has been verified.)
- 2010-12-28 16:42:07下载
- 积分:1
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polyphaseFIR_1v0
polyphase fir dilter
- 2016-02-19 21:32:07下载
- 积分:1
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Version1
小波包分解,重构轴承振动信号,Hilbert包络,FFT进行频谱分析,以获得轴承故障频率。(Wavelet packet decomposition, reconstruction of bearing vibration signal, Hilbert envelope, FFT spectrum analysis to obtain the bearing fault frequencies.)
- 2013-07-17 11:37:05下载
- 积分:1
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ahb sram控制器设计
ahb总线的sram 控制器设计,支持8/16/32位传输,支持片选信号达到低功耗设计的目的。ahb增量传输和猝发传输二种方式。SRAM采用标准的SRAM产生器生成。自带mbist。代码经过验证。包含完整代码和验证环境
- 2022-07-22 13:10:37下载
- 积分:1
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Sigma-Delta ADC的例子
Verilog代码为Sigma-Delta ADC的实现。Verilog是包含testbench。NDIFF V。V的冬天。readmem V。V梳状滤波器。combfilter_tb V。combfilter_wrap.vhd
- 2022-03-22 13:11:17下载
- 积分:1
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SPI_slave代码,已经实用!
SPI_slave代码,地址长度可设1~3字节,时钟可以运行到20MHz以上,已经在项目里使用,有需要的可以再根据自己的要求修改!!!!
- 2022-10-15 13:00:02下载
- 积分:1
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SourceFile
PS2键盘实验Verilog HDL代码(PS2 keyboard experiment Verilog HDL code)
- 2008-03-15 01:14:55下载
- 积分:1
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uart
Verilog UART is written in this file
- 2013-04-16 12:34:05下载
- 积分:1