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segment
This source is used to control 7 segments on FPGA boad
- 2014-11-10 13:33:13下载
- 积分:1
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Farrow
matlab代码,利用Farrow结构设计分数延时滤波器,滤波器阶数和个数可分别进行设置,利用最大最小准则近似。(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)
- 2021-03-28 22:29:11下载
- 积分:1
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vendingmachine
vendingmachine vhdl code
- 2011-12-03 20:53:39下载
- 积分:1
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ser_to_parr
很有用的10bit串并转换verilog程序,需要的可以拿去参考下,在quartusII上已验证过(Useful 10bit string and convert verilog program, need to take a reference, has been verified in quartusII)
- 2012-05-21 16:21:22下载
- 积分:1
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apb timer
说明: 是基于apb总线下的timer外设的rtl代码,主要包括apb_timer的master逻辑verilog,以及相应的开发文档,包括寄存器的描述,功能特性等。(RTL code is based on timer peripheral under APB bus, which mainly includes master logic Verilog of apb_timer and corresponding development documents, including the description of registers, functional characteristics and so on.)
- 2019-01-25 16:54:02下载
- 积分:1
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Verilog--Fourth-Edition
FPGA开发必备工具书,适合初学者。语法、范例讲的都很详细,是一部不错的工具书。(Verilog hardware description language Fourth Edition)
- 2015-09-30 12:34:50下载
- 积分:1
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audio_verilog
AUDIO音频模块AN831的录音及播放FPGA代码,测试通过(AUDIO audio module AN831 recording and playback of FPGA code, the test passed)
- 2020-09-12 09:27:58下载
- 积分:1
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3Code_for_Medx
3x3中值滤波器的FPGA实现现(VERILOG)可直接使用。
(3x3 median filter FPGA implementation of the present (VERILOG) can be used directly.)
- 2012-07-30 00:49:45下载
- 积分:1
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jtag
verilog语言编写的jtag(边界扫描模块),初学的时候可以看看(verilog language jtag (boundary scan module), a novice when you can look)
- 2021-04-27 14:38:44下载
- 积分:1
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自动售货机的Verilog
应用背景这里的目标是设计自动售货机控制器接受资金投入(我和)在任何序列,并提供产品时所需的量已沉积并给出了改变。在这里向用户提供附加设备。这是可以撤回的如果客户希望通过按一个按钮的话,存入的钱。并;规格:1。价格的产品= rs.3。2。可能的资金的投入= 20和1。3。产品为交付时达到rs.3或RS。4。按按钮有没有(普)表示取消交易和数额的返还沉积关键技术/ *
- 2022-03-19 18:10:13下载
- 积分:1