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making a simple clock using altera vhdl
making a simple clock using altera vhdl
- 2022-04-16 21:53:47下载
- 积分:1
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qianzhaowang
说明: 一个简单的千兆以太网UDP协议的实现,可以实现数据的收发和ARP,实现PC端与FPGA的以太网通信(A simple implementation of Gigabit Ethernet UDP protocol can realize data sending and receiving and ARP, and realize Ethernet communication between PC and FPGA.)
- 2019-01-21 17:18:13下载
- 积分:1
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bianyuanjiance
说明: 图像采集 VGA输出 图像的边缘 ov7670(V image acquisition VGA output image edge)
- 2020-06-21 13:20:06下载
- 积分:1
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VHDL程序
利用QuartusⅡ6.0对所设计的出租车计费器的VHDL代码进行仿真,并在FPGA数字实验系统上实现了该控制。(The Quartus II 6 is used to simulate the VHDL code of the designed taxi billing device, and the control is realized on the FPGA digital experiment system.)
- 2017-12-14 12:35:23下载
- 积分:1
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基于Verilog代码简单
simple code based on verilog
shifter , cla ,clg , ALU ,PC, decoder ,
tb_top
- 2022-02-26 06:52:19下载
- 积分:1
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OFDM-analysis-and-simulation
实现了光OFDM模块的各个功能,同时仿真分析了OFDM的载波幅度谱、相位谱、每个载波对应的时域信号、整个时域/频域的OFDM、每个接收符号的分布图。计算了相位差等等(To achieve the various functions of the optical OFDM module, the simulation analysis of the the the OFDM carrier amplitude spectrum and phase spectrum, and the time domain signal corresponding to each carrier, the whole time domain/frequency domain OFDM, each reception symbol maps. Calculated phase difference)
- 2020-10-17 16:17:28下载
- 积分:1
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SPI经典ip核
可以直接用于工程的开发和利用
SPI经典ip核
可以直接用于工程的开发和利用-err
- 2023-02-04 19:10:03下载
- 积分:1
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FPGA_SSI
说明: 文档中的verilog代码实现了FPGA与SSI总线的数据协议链接(Verilog code in the document of the FPGA data bus protocol and SSI links)
- 2021-04-19 17:08:51下载
- 积分:1
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mun_base
说明: adfvff f fdfs f dvdsz dz vdzsvd hdfdgvaz
- 2019-03-28 07:33:03下载
- 积分:1
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FPGA
基于FPGA的图像采集卡的设计与相关说明-FPGA-based design of frame grabbers and related note
- 2023-06-09 09:00:04下载
- 积分:1