-
rs_enc
Verilog code for RS-(255,239) encoder.
- 2021-04-06 16:19:02下载
- 积分：1
-
multiplier.tar
用vhdl实现的booth算法乘法器，包含了multiplexer和rca adder，同时提供了一个测试文件，modelsim测试通过(Algorithm with a booth multiplier vhdl implementation, including a multiplexer and rca adder, while providing a test file, modelsim test pass)
- 2021-04-14 13:18:55下载
- 积分：1
-
DE2_115_TV
DE2-115开发板TV摄像头成像程序，源码亲测可用，可加入边缘算法成像，实时显示轮廓，速度流畅(The DE2-115 development board TV camera imaging procedures, the pro-test in the source can be added to the edge algorithms imaging, real-time display contours, fast-paced)
- 2020-07-09 19:18:55下载
- 积分：1
-
Tun2CNk2
FPGA实现DSP的Verilog 示例(FPGA realization of DSP-Verilog Example)
- 2008-05-05 17:08:19下载
- 积分：1
-
unishift
An universal shift register performs the following tasks load, right shift ,left shift and parallel load as the selection inputs are 00,01,10,11 respectively. Such a register is implemented here in Quartus.
- 2009-09-24 18:56:48下载
- 积分：1
-
tdma_code
tdma参数化模块。可以自动生成2的n次的tdma哥时隙，用户可根据需要自己配置参数(tdma see the number of model lumps. 2 n basis following manner tdma chance possible 以自 dynamic generation, for root needed self-placement see number)
- 2013-09-03 21:52:51下载
- 积分：1
-
8051core
一款非常实用的8051IPcore,本人现在做soc的控制部分就是它。(A very useful 8051IPcore, I now control part of the soc is doing it.)
- 2010-11-02 10:10:32下载
- 积分：1
-
alu
verilog code for 8 bit alu
- 2015-06-30 18:49:10下载
- 积分：1
-
道路检测
以Cyclon II 系列芯片EP2C35F672C6N 为核心的开发板，用verilog语言描述高速公路上汽车行驶的状态，检测t时刻高速公路上汽车行驶的是否在当前规定的车道内。
- 2022-07-05 03:48:17下载
- 积分：1
-
shuzizhongsheji
有用的数字钟设计文档，有秒表、闹钟等模块，希望对大家有用！(JUST LEARN FROM IT!!ENJOY!)
- 2013-07-18 11:02:24下载
- 积分：1
