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STM32F407FFT
使用STM32官方提供的DSP库进行FFT，虽然在使用上有些不灵活（因为它是基4的FFT，所以FFT的点数必须是4^n），但其执行效率确实非常高效，看图1所示的FFT运算效率测试数据便可见一斑。该数据来自STM32 DSP库使用文档(. Using the official DSP library provided by STM32 for FFT is not flexible in use (because it is the FFT of base 4, so the number of FFT points must be 4 ^ n), but its execution efficiency is really very efficient, as can be seen from the test data of FFT operation efficiency shown in Figure 1. This data comes from STM32 DSP library usage document)
- 2020-06-20 19:00:02下载
- 积分：1
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用VHDL实现视频控制程序(实现对图像的采集和压缩)
用VHDL实现视频控制程序(实现对图像的采集和压缩)-Using VHDL video control procedures (the achievement of the image acquisition and compression)
- 2022-12-07 16:40:03下载
- 积分：1
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一个8位CISC结构的精简CPU，2还提供了编译器
一个8位CISC结构的精简CPU，2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler
- 2022-02-28 11:37:41下载
- 积分：1
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c_xapp260
xilinx应用指南xapp260的中文翻译版本。利用 Xilinx FPGA 和存储器接口生成器简化存储器接口。本白皮书讨论各种存储器接口控制器设计所面临的挑战和 Xilinx 的解决方案，同时也说明如何使用 Xilinx软件工具和经过硬件验证的参考设计来为您自己的应用（从低成本的 DDR SDRAM 应用到像 667 Mb/sDDR2 SDRAM 这样的更高性能接口）设计完整的存储器接口解决方案。(The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing
Warfare and Xilinx solutions, but also explains how to use Xilinx
Software tools and hardware-proven reference designs to be for your own
With (from low-cost DDR SDRAM applications to such as 667 Mb/s
This higher performance DDR2 SDRAM interface) design a complete deposit
Storage device interface solution.)
- 2009-11-03 10:01:20下载
- 积分：1
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Lcd
说明： VHDL资料 很不错的！！！！！！！！！！！(VHDL )
- 2009-08-14 22:47:46下载
- 积分：1
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sdram
数字ic设计，二级缓存，格雷码，深度256，(Digital IC design, two level cache, gray code, depth 256.)
- 2018-10-31 10:40:37下载
- 积分：1
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加减法器
可实现两个4bit补码的加法及减法，有溢出提示(adder with overflow hint)
- 2017-07-19 20:52:42下载
- 积分：1
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Rabaey---Digital-Integrated-Circuits-2e-(Prentice
imp book for cmos technology
- 2015-04-10 15:39:16下载
- 积分：1
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add_noisem
把指定的噪声叠加到信号上去.有标准噪声库NOISEX-92，其中带有白噪声、办公室噪声、工厂噪声、汽车噪声、坦克噪声等等，在信号处理中往往需要把库中的噪声叠加到信号中去，而噪声的采样频率与纯信号的采样频率往往不一致，需要采样频率的校准。
(The specified noise superimposed to the signal up. Standard noise library NOISEX-92, with white noise, office noise, factory noise, car noise, tank noise in the signal processing often requires noise to be superimposed in the library The signal to noise of the sampling frequency and pure signal sampling frequency is often inconsistent sampling frequency of calibration.)
- 2012-08-10 14:18:33下载
- 积分：1
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FM_DemodNew
FM接收机 基于FPGA的调频收音机的设计
用VEIRLOG语言编程，利用QUARTUSii与MODELSIM联合仿真(FM receiver on FPGA FM receiver design
With VEIRLOG language program, use QUARTUSii and MODELSIM joint simulation)
- 2021-04-07 12:49:01下载
- 积分：1
