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其基于FIFO的设计
its a Fifo BASED design
i also Interface DAC2904
- 2023-02-01 15:35:04下载
- 积分:1
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fault
fault minimization using genetic algorithm
- 2013-11-19 20:05:06下载
- 积分:1
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Uart2Sdram2TFT_median_filter
说明: 使用FPGA实现中值滤波算法,能够使数据直接使用该系统对数据进行中值滤波。(FPGA is used to realize the median filtering algorithm, which can make the data directly use the system for median filtering.)
- 2019-12-30 21:27:58下载
- 积分:1
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DE2_115_SD_Card_Audio_Player
该代码实现了对SD 卡的读写操作,是一个较好的范例。(The code achieves access reading SD CARD based on DE-2,It is
a good example。)
- 2012-08-14 00:29:47下载
- 积分:1
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Verilog implementation USB program, open the project file with the ISE can be
Verilog实现的USB程序,用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
- 2022-01-21 21:28:31下载
- 积分:1
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100例VHDL语言解释,北京理工大学毕业…
VHDL语言100例详解,北京理工大学ASIC研究生出版,这里是51~94个examples-VHDL language of 100 cases explain, Beijing Institute of Technology, Graduate ASIC publication, here is the 51 ~ 94 examples
- 2022-04-16 00:12:16下载
- 积分:1
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UART VHDL Quartus
uart的vhdl实现,包含完整quartus工程文件,相信会有较大帮助-uart vhdl quartus
- 2022-03-13 00:29:53下载
- 积分:1
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实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。...
实光电码盘的输出数据的四倍频,使码盘输出精度提高四倍。-real photoelectric encoder output data of the four frequency, accuracy encoder output increased by four times.
- 2022-01-23 10:41:40下载
- 积分:1
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1024
1024点FFT快速傅立叶变换,(vhdl代码)-1024-point FFT vhdl
- 2022-04-25 16:04:00下载
- 积分:1
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lab2
说明: 使用vivado和Xilinx开发板实现抢答器,开发板为Xilinx Artix-7(Using vivado and Xilinx development board to achieve the responder, the development board is Xilinx artix-7)
- 2021-04-23 01:58:48下载
- 积分:1