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11阶滤波器的verilog编程语言，可很好的实现滤波功能。
11阶滤波器的verilog编程语言，可很好的实现滤波功能。-11-order filter verilog programming language, can achieve very good filtering.
- 2023-01-07 03:40:03下载
- 积分：1
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mul
实现有限域中乘法，输入二个普通二级制数，输出在本原多项式的乘法结果(Achieve limited multiplication field, enter the number of two-tier system of two ordinary output in primitive polynomial multiplication results)
- 2014-01-12 22:52:38下载
- 积分：1
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电梯控制器程序设计与仿真的vhdl源代码
电梯控制器程序设计与仿真的vhdl源代码-Elevator controller design and simulation of vhdl source code
- 2022-04-08 14:05:19下载
- 积分：1
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sram
FPGA控制SRAM读写时序源码，代码桂发，新手一看就懂(FPGA control SRAM write timing source code Guifa novice understand at a glance)
- 2020-06-30 03:00:01下载
- 积分：1
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NRZ_2_Manchester_Moore
this example exchanges the NRZ code to the MANCHESTER code with moore output
- 2010-01-29 18:46:08下载
- 积分：1
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讲解用FPGA及其他芯片组成视频处理的电路设计和PFGA的程序的实现...
讲解用FPGA及其他芯片组成视频处理的电路设计和PFGA的程序的实现-Explain the use of FPGA and other video processing chips of the circuit design and FPGA realization of the procedure
- 2022-06-12 17:12:42下载
- 积分：1
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VCS
VCS详细学习资料。内涵专业研究院所内部培训资料。适合于初学者学习使用，易于上手。(VCS learning)
- 2012-10-26 10:14:09下载
- 积分：1
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ps2_lcd
此代码能够使得键盘控制液晶，实时的进行书写，按下Backspace清屏(This code enables the keyboard to control the LCD, in real-time writing, press Backspace clear the screen)
- 2013-01-27 11:04:40下载
- 积分：1
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src
说明： 假设每个从设备中有可访问APB寄存器16个，位宽均为32比特，16个寄存器的访问地址计算方式为 基址 + 寄存器编号左移２位（byte 偏移）(Assuming that there are 16 accessible APB registers in each slave device, the bit width is 32 bits, and the access address of 16 registers is calculated by base address + register number left shift 2 bits (byte offset).)
- 2020-12-15 13:49:14下载
- 积分：1
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sdram_epm570_uart
基于CPLD芯片EPM570的verilog hdl串口程序(the UART verilog hdl code based on CPLD chip-- EPM570)
- 2014-06-03 20:27:45下载
- 积分：1
