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FPGA_MVB
此论文想详细阐明了用FPGA做硬件处理，集成SOPC功能实现MVB通讯协议的解决方案，可以运行在alter fpga上面。(This paper expounds in detail the processing to do with FPGA hardware, integrated solutions for SOPC function of the realization of MVB communication protocol, can run in alter FPGA above.)
- 2021-01-03 17:58:56下载
- 积分：1
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fir_lms
基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。(FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.)
- 2009-04-27 12:06:25下载
- 积分：1
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edge_detect_p
用于检测信号上升沿，输出与时钟相关的正脉冲(Detect the rising edge of the signal)
- 2012-03-27 14:49:21下载
- 积分：1
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clk_div_4
说明： Verilog代码实现四分屏，在Vivado平台下实现的，可仿真(Verilog code realizes four screens, which can be simulated under vivado platform)
- 2020-12-21 20:39:08下载
- 积分：1
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静态时序分析
说明： fpga 静态时序分析 是电子工程中，对数字电路的时序进行计算、预计的工作流程，该流程不需要通过输入激励的方式进行仿真。(Static time series analysis is a work flow which can calculate and predict the time series of digital circuits in electronic engineering.)
- 2020-06-16 11:10:56下载
- 积分：1
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OFDM-analysis-and-simulation
实现了光OFDM模块的各个功能，同时仿真分析了OFDM的载波幅度谱、相位谱、每个载波对应的时域信号、整个时域/频域的OFDM、每个接收符号的分布图。计算了相位差等等(To achieve the various functions of the optical OFDM module, the simulation analysis of the the the OFDM carrier amplitude spectrum and phase spectrum, and the time domain signal corresponding to each carrier, the whole time domain/frequency domain OFDM, each reception symbol maps. Calculated phase difference)
- 2020-10-17 16:17:28下载
- 积分：1
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Frame-synchronizer-
原创，帧同步器的Verilog代码，在FPGA上验证实现过，无误。作为通信系统帧传输的仿真，有限状态机同步态和失步态的切换仿真。(Original Verilog code for frame synchronization, verify the implementation on the FPGA, and correct. Frame transmission as the communication system simulation, finite state machine synchronous state and the loss of the switching simulation of gait.)
- 2012-04-01 19:38:54下载
- 积分：1
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浮点乘法
这个
- 2022-09-08 12:05:02下载
- 积分：1
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static-timing-analyze
特权同学主讲的FPGA设计的时序约束专题（STA部分）(Speaker privileged classmates timing constraints for FPGA design topics (STA section))
- 2013-07-11 13:23:46下载
- 积分：1
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Verilog HDL
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- 2023-03-01 03:55:03下载
- 积分：1
