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FSK
2FSK的matlab仿真，叠加了高斯白噪声(2FSK matlab simulation, superimposed on a Gaussian white noise)
- 2021-04-13 02:58:56下载
- 积分：1
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AD_TO_FIFO
A/D采集的数据缓存进入fifo，并通过读信号将FIFO中的数据送入网口(A/D sample data buffer to fifo,and then read enable to ethernet.)
- 2020-07-10 21:08:54下载
- 积分：1
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基于Basys3的贪吃蛇小游戏
基于Basy3的贪吃蛇小游戏，实现了相关功能。(Snake Eating Game Based on Basy3)
- 2021-03-10 20:39:26下载
- 积分：1
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DS28E01
用verilog语言实现加密芯片DS28E01的调用操作命令。(Using Verilog language to achieve the encryption chip DS28E01 call operation commands.)
- 2021-03-17 09:49:21下载
- 积分：1
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SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。...
SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not
incorporated into the SDR SDRAM Controller White Paper v1.1.
- 2023-07-19 13:10:03下载
- 积分：1
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McBSP
CPLD对mcbsp的收发操作，占用资源很少(CPLD to mcbsp transceiver operation, small footprint)
- 2011-09-14 16:19:51下载
- 积分：1
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一个用vhdl硬件描述语言实现的一个比较简单的除法器
一个用vhdl硬件描述语言实现的一个比较简单的除法器-an divider using vhdl
- 2022-05-15 11:56:12下载
- 积分：1
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main
完整的GMSK调制及维特比译码，程序中包括了高斯滤波器的设计，调制相位的计算，并采用了维特比译码算法解调出原始码元，最后计算了其误码率。(Complete GMSK modulation and Viterbi decoding, the program includes a Gaussian filter design, the calculation of the phase modulation, and uses the Viterbi algorithm demodulates the source element, the final calculation of the bit error rate.)
- 2020-11-03 16:19:54下载
- 积分：1
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A complete viterbi coding procedures, the use of VHDL language, as well as test...
一个完整的viterbi编码程序，使用vhdl语言编写，还有测试程序-A complete viterbi coding procedures, the use of VHDL language, as well as test procedures
- 2022-04-12 08:34:41下载
- 积分：1
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adc
基于DSP28335的产生ADc采样的程序(Program for generating ADC sampling based on DSP28335)
- 2018-11-30 14:45:33下载
- 积分：1
