-
AVR_Core.tar
CPLD例程(语言)《Verilog HDL数字控制系统设计实例》AVR_Core.tar.gz-.rar(CPLDprogram dialogue /Verilog language design examples)
- 2011-11-12 20:43:49下载
- 积分：1
-
waveform_-generator
简易信号波形发生器，可以产生四种波形，频率1k-20K步进可调。学习Verilog HDL的好例子。(imple signal waveform generator, can produce four waveform, frequency 1 k-20 k step can be adjusted. Learning Verilog good example of HDL.
)
- 2011-06-12 21:13:27下载
- 积分：1
-
EasyWifiRadar
EasyWifiRadar.zip r ok
- 2014-04-12 20:24:43下载
- 积分：1
-
用vhdl写实用96例子
用vhdl写实用96例子, 有RAM，PID 等(Using VHDL to write practical examples of 96, there are RAM, PID and so on)
- 2017-09-13 14:55:39下载
- 积分：1
-
yibuqingling
含异步清零和同步清零的计数器的设计，内容是源代码，以及相关文件，打开即可(Clear cleared asynchronous and synchronous with the counter design, content source code and related documents, can be opened)
- 2011-08-24 10:44:33下载
- 积分：1
-
multifreqvhdl
说明： 资料是本人根据相关文献资料用vhdl语言编写的旋转机械鉴相信号倍频的程序，multifre1.vhd是倍频程序，multifre1.vwf是仿真波形文件，stp1.stp是虚拟逻辑分析仪signaltap文件。该倍频程序可以直接使用，可以设置倍频数，修改实体参数N即可。(According to the literature data is the information I have written in with vhdl Rotating Machinery Kam believe that the procedure multiplier number, multifre1.vhd is the multiplier process, multifre1.vwf is the simulation waveform files, stp1.stp a virtual logic analyzer signaltap file. The multiplier process can be used directly, you can set the multiplier number, modify the parameter N can be solid.)
- 2010-04-26 16:05:18下载
- 积分：1
-
tlc549
数字电压表的实现，VHDL语言实现，AD采用TLC549，通过学习，了解AD采集过程(The realization of digital voltage meter, VHDL language, AD using TLC549, by learning to understand the acquisition process AD)
- 2009-07-09 09:15:15下载
- 积分：1
-
PCI_arbi
PCI arbi verilog source code
- 2009-03-29 18:04:41下载
- 积分：1
-
基于FPGA的多路同步脉冲发生器设计1
说明： 采用FPGA（现场可编程门序列）编写VHDL语言设计多路同步脉冲发生器，对信号进行分频处理，实现四路信号相位相差T/16和T/8的延迟相位输出，实现的四路脉冲与传统的脉冲同步器不同，它具有高集成度，高通用性，容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide the frequency of the signal, to achieve the four-way signal phase difference T / 16 and T / 8 delay phase output, the realization of the four-way pulse is different from the traditional pulse synchronizer, it has the characteristics of high integration, high-throughput, easy adjustment and high reliability.)
- 2020-03-18 20:52:05下载
- 积分：1
-
1_Carm
经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)
- 2019-03-19 13:38:29下载
- 积分：1
