-
9. For the key to enter a password lock, assuming that reset after the seven lam...
9对于输入密码锁的键，假设复位后七个灯显示" 0"，使用sw1、sw2、sw3、sw4 4，只需按下并松开任意sw1、sw2键，使七个灯显示值加" 1"，只要按下并松开任意sw3、sw4，将使七个灯显示值加" 2"
- 2022-10-18 01:25:04下载
- 积分：1
-
其基于FIFO的设计
its a Fifo BASED design
i also Interface DAC2904
- 2023-02-01 15:35:04下载
- 积分：1
-
任意基数分频VERILOG代码，经过了编译，可以修改数字改变分频。...
任意基数分频VERILOG代码，经过了编译，可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.
- 2022-08-10 12:37:41下载
- 积分：1
-
Version1
小波包分解，重构轴承振动信号，Hilbert包络，FFT进行频谱分析，以获得轴承故障频率。(Wavelet packet decomposition, reconstruction of bearing vibration signal, Hilbert envelope, FFT spectrum analysis to obtain the bearing fault frequencies.)
- 2013-07-17 11:37:05下载
- 积分：1
-
-Elliptic
We present elliptic curve cryptography (ECC) coprocessor,
which is dual-field processor with projective
coordinator. We have implemented architecture for scalar
multiplication, which is key operation in elliptic curve
cryptography. Our coprocessor can be adapted both prime field
and binary field, also contains a control unit with 256 bit serial
and parallel operations , which provide integrated highthroughput
with low power consumptions. Our scalar multiplier
architecture operation is perform base on clock rate and produce
better performance in term of time and area compared to similar
works. We used Verilog for programming and synthesized using
Xilinx Vertex II Pro devices. Simulation was done with Modelsim
XE 6.1e, VLSI simulation software from Mentor Graphics
Corporation especially for Xilinx devices.
- 2012-02-09 10:48:50下载
- 积分：1
-
ORIGINAL_DOWNLOAD
说明： risc 8 by coonan compatible with PIC16C57
- 2019-12-05 20:32:55下载
- 积分：1
-
Meyers-Wavelet.txt
Meyers wavelet. DWT VHDL.
- 2011-10-10 22:01:44下载
- 积分：1
-
AWGN_VerilogDesign-master
加性高斯白噪声生成的VERILOG实现，包含所有的testbench文件。可直接使用(Additive white gaussian noise generated VERILOG realized, including all testbench files. Can be used directly)
- 2021-01-14 19:18:46下载
- 积分：1
-
VHDL语言实现摄像头的捕捉和采集,通过仿真验证，很好哈
VHDL语言实现摄像头的捕捉和采集,通过仿真验证，很好哈-vidicon s catch and collection in VHDL
- 2022-09-22 03:05:04下载
- 积分：1
-
在FPGA高速ADC-ADC08D1000沟通
这是由阿龙利开发的程序，以控制ADC08D1000模拟 - 数字设备中的FPGA，赛灵思的Virtex-4 SX35 FPGA此处应用，DCM的用于控制FPGA中的时钟路径，所述时钟源是AD9517该PLC控制的FPGA中的串行端口
- 2022-01-25 18:39:36下载
- 积分：1
