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EC-67-XT_en
LED based video wall tech spec
- 2012-12-20 20:27:37下载
- 积分:1
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8b10b
8b10b编解码,用于光通信和千兆以太网,verilog编写,已验证(8b10b codec for optical communications and Gigabit Ethernet, verilog prepared Verified)
- 2021-01-27 09:48:41下载
- 积分:1
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联邦滤波法lianbanglvbo
联邦滤波法,毕设时写的,可以和其他方法的做比较(Kalman filter, write the complete set up, and other methods to compare)
- 2020-12-01 18:49:26下载
- 积分:1
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用于FPGA的huffman算法的HDL编码
用于FPGA的huffman算法的HDL编码,包括VHDL及Verilog代码。可用于JPEG及MPEG压缩算法。(The huffman algorithm for FPGA HDL coding, including VHDL and Verilog code. Can be used in JPEG and MPEG compression algorithms.)
- 2008-08-01 17:25:44下载
- 积分:1
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RS
说明: 本文设计了基于FPGA的,用verilog HDL语言描述的在伽罗华域GF( )上的RS(6,4)编码器。在ISE软件上用verilog HDL语言分别对每个模块进行描述,然后在软件上进行编译、仿真,最终实现RS(6,4)编码,下载之后用chipscope采集数据,分析符合仿真结果,达到设计的要求。(This paper is designed based on FPGA, described by Verilog HDL language in Galois field GF () on RS (6,4) encoder. Using the ISE software Verilog HDL language for each module is described, and then compile, simulation in software, the ultimate realization of the RS (6,4) encoding, after downloading by chipscope data acquisition, the analysis with the simulation results meet the design requirements.)
- 2017-08-25 17:59:14下载
- 积分:1
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quartus II中文用户教程(英文版的完全翻译)
说明: quartus II中文用户教程(英文版的完全翻译),和一切爱好可编程器件的同仁共勉之(Quartus II Chinese user guide (English version of the full translation) love and all programmable devices colleagues share Zhi)
- 2020-12-21 14:19:08下载
- 积分:1
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Waveform-generation-program
基于VHDL语言的波形发生器编程设计,能够实现常用波形的产生。(Waveform generator design based on VHDL programming, to achieve common waveform generated.)
- 2014-05-05 16:50:23下载
- 积分:1
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shukongfenpinqi
数控分频器的设计
数控分频器的功能就是当在输入端给定不同输入数据时,将对输入的时钟信号有不同的分频比,例3的数控分频器就是用计数值可并行预置的加法计数器设计完成的,方法是将计数溢出位与预置数加载输入信号相接即可。(NC NC divider divider design of its function is when the input given different input data, input the clock signal will have different frequency than, for example 3 is to use the NC prescaler count preset value of the adder parallel counter design is completed, the method is to count the number of overflow bit with preset load to the input signal phase.)
- 2008-12-13 09:56:51下载
- 积分:1
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ces_uvm-1.2_2016.06.tar
说明: uvm lab代码以及uvm1.2源码,带有使用说明文档,可以照着文档一步一步深入了解uvm代码。(The code of UVM lab and the source code of uvm1.2 are provided with instruction documents. You can follow the documents step by step to understand the UVM code.)
- 2020-10-01 09:47:42下载
- 积分:1
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8051 核verilog源代码
8051 核 RTL 源代码,带testbench 和综合脚本
8051 核 RTL 源代码,带testbench 和综合脚本
8051 核 RTL 源代码,带testbench 和综合脚本
8051 核 RTL 源代码,带testbench 和综合脚本
8051 核 RTL 源代码,带testbench 和综合脚本
8051 核 RTL 源代码,带testbench 和综合脚本
8051 核 RTL 源代码,带testbench 和综合脚本
8051 核 RTL 源代码,带testbench 和综合脚本
- 2023-01-12 05:35:03下载
- 积分:1