登录
首页 » VHDL » 开源软核处理器OpenRisc的SOPC设计

开源软核处理器OpenRisc的SOPC设计

于 2022-01-25 发布 文件大小:764.96 kB
0 122
下载积分: 2 下载次数: 1

代码说明:

开源软核处理器OpenRisc的SOPC设计

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • 这是用Verilog HDL写的可调占空比分频控制器,可以挂在Avalon总线上使用...
    这是用Verilog HDL写的可调占空比分频控制器,可以挂在Avalon总线上使用-This is written in Verilog HDL with adjustable duty cycle frequency controller, can be hung on the Avalon bus use
    2022-09-09 08:45:02下载
    积分:1
  • lab4_0419
    Run-Length Encoder Example: Input Sequence (hexadecimal format): 0A, 14, 14, 14, 14, 14, 14, 14, 56, 56, 56, 56, 56, 32, 32, 07 Output Sequence (hexadecimal format): 0A, 14, 87, 56, 85, 32, 32, 07
    2015-05-04 05:36:31下载
    积分:1
  • 基于fpga的信号发生器DDS
    说明:  基于fpga的信号发生器,通过调整按键可以生成正弦波,方波,三角波,锯齿波(Sine wave, square wave, triangular wave, sawtooth wave)
    2020-07-19 21:21:12下载
    积分:1
  • RISC-V-Reader-Chinese-v2p1
    RISC-V 芯片设计规范,很有参考价值,开源芯片设计必备参考资料,希望对大家有帮助。(The RISC-V Foundation is chartered to standardize and promote the open RISC-V instruction set architecture)
    2020-07-01 23:00:02下载
    积分:1
  • widgets
    CSS配合jquery制作完美漂亮的时钟,貌似在IE8下时钟不能获取时间啊!支持ie9、chrome、safari、firefox、opera (Chrome显示效果最佳,IE9下时钟无法工作)日历和骰子是原创,CSS3时钟并非原创但经过改良支持opera。数字日历的兼容性不错,圆形时钟就差点了,也希望一起交流,共同改进。(CSS with the jquery make perfect beautiful clock, seemingly in IE8 under the clock can not get the time ah! Support ie9, chrome, safari, firefox, opera (Chrome show the best results, the clock does not work under IE9) calendar and dice is original, CSS3 clock is not original but after improved support opera. Digital calendar compatibility is good, almost round the clock on, and also hope together, and work together to improve.)
    2014-10-31 09:25:37下载
    积分:1
  • MapCG
    cpu与GPU协同计算一个同时支持GPU与CPU的MapReduce框架实现(cpu and GPU collaborative computing)
    2014-12-04 23:06:54下载
    积分:1
  • 数字电子钟设计完整设计,包括原理介绍,程序设计,波形仿真...
    数字电子钟设计完整设计,包括原理介绍,程序设计,波形仿真-Design a complete digital electronic clock design, including the principle of introduction, program design, waveform simulation
    2022-02-14 06:20:36下载
    积分:1
  • costas_BPSK
    说明:  文档科斯塔斯环路滤波器。。。。。般若撒根本(wendangsafwrfgvearbeabf)
    2019-10-29 20:06:34下载
    积分:1
  • 玩转LVDS_USB
    说明:  verilog 版本,Xilinx玩转USB3.0,LVDS接口(verilog version,Xilinxplay with USB3.0,LVDS)
    2021-01-01 16:01:57下载
    积分:1
  • PWM
    采用STC89C52单片机的定时器以实现两路PWM波输出,占空比、频率可调(Microcontroller timer used to achieve STC89C52 two PWM wave output, duty cycle, frequency adjustable)
    2021-04-24 10:08:47下载
    积分:1
  • 696518资源总数
  • 105885会员总数
  • 31今日下载