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these files are written in verilog but i am uploading in text format
these files are written in verilog but i am uploading in text format
- 2022-02-06 16:09:07下载
- 积分：1
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Viterbi译码器IP核，可以直接编译使用
viterbi译码器的IP核，可以直接编译使用-viterbi decoder IP core, the compiler can directly use
- 2023-01-24 09:35:04下载
- 积分：1
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Verilog HDL编写的CPU模型，很经典，比较通用
Verilog HDL编写的CPU模型，很经典，比较通用-Verilog HDL prepared by the CPU model, classic, more generic
- 2022-03-21 08:58:27下载
- 积分：1
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实验课的作业，包括半加器、全加器、加/减法器，使用逻辑图和VHDl描述，包括分析和报告。...
实验课的作业，包括半加器、全加器、加/减法器，使用逻辑图和VHDl描述，包括分析和报告。-experiment include the operation of a half adder, full adder, plus/subtraction device, and the use of logic diagram VHDl description, including analysis and reporting.
- 2022-12-20 07:25:03下载
- 积分：1
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MUX
Multipleksor
3 to 1 - 3x1bit in, 1x1bit out
- 2013-09-18 16:21:25下载
- 积分：1
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eth_send
清华大学sdr项目，网口代码。Verilog编写。很实用。希望大家喜欢。(Tsinghua University sdr project, network interface code. Verilog preparation. Very practical. Hope you like it.)
- 2010-09-26 14:43:28下载
- 积分：1
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check_net_test
用来检查FPGA通过PHY发送数据时是否有掉帧的现象(FPGA is used to check whether the PHY sends the data out of the frame with the phenomenon of)
- 2011-11-18 10:28:02下载
- 积分：1
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can_latest.tar
用verilog编写的can总线控制器，包括设计参考历程和仿真程序，以及开发文档！(Written by verilog can bus controller, including the design reference course and simulation program, and the development of the document!)
- 2015-07-23 19:55:03下载
- 积分：1
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c8051fPLL
说明： C8051F的一个特点就是可以倍频到100M。近来用到。在单片机的调试通过其PLL倍频函数。供用到的朋友参考和借鉴。(One feature is the ability C8051F multiplier to 100M. Recently used. In MCU debugging functions through its PLL multiplier. Used for reference for a friend.)
- 2021-03-04 12:39:32下载
- 积分：1
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segment
This source is used to control 7 segments on FPGA boad
- 2014-11-10 13:33:13下载
- 积分：1
