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Decimal precision counts, classic written, easy learning and reference for all t...
十进制精确计数,经典写法,便于学习与参考,供大家分享-Decimal precision counts, classic written, easy learning and reference for all to share
- 2022-03-24 02:37:10下载
- 积分:1
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vhdl学习方法,含有大量的vhdl源代码,对vhdl的语法的介绍
vhdl学习方法,含有大量的vhdl源代码,对vhdl的语法的介绍-VHDL source习laugh Yang, Yi bleed at the nose cavity submerged stresses measured tungsten Daitou VHDL, VHDL-Qin Pang Yang cavity cavity Geng Zhuang
- 2023-07-17 16:40:03下载
- 积分:1
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基于FPGA的交通控制器
设计一个由一条主干道和一条支干道的汇合点形成的十字交叉路口的交通灯控制器: 1) 主、支干道各设有3个方向的绿、黄、红指示灯(左转、直行和右转),每个行驶方向均配有时间显示数码管;2) 主干道处于常允许通行状态,而支干道有车来才允许通行(由外部信号通知)。3) 当主、支道均有车时,两者交替允许通行,主干道每次放行90s,支干道每次放行60s,在每次由亮绿灯变成亮红灯的转换过程中,要亮5s黄灯作为过渡,并进行减计时显示。
- 2022-02-26 08:00:04下载
- 积分:1
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A clock procedures, as well as stopwatch, I feel pretty good, there is a need to...
一个时钟程序,还有跑表,感觉相当不错的,有需要就下载吧-A clock procedures, as well as stopwatch, I feel pretty good, there is a need to download it
- 2022-03-12 05:29:00下载
- 积分:1
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不足20元的PCI设计,含ABEL源代码。
不足20元的PCI设计,含ABEL源代码。-PCI design less than 20Yuan ,including ABEL code
- 2022-01-24 17:08:50下载
- 积分:1
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XILINX平台DDR3设计教程
从零开始的Xilinx DDR3 控制程序编写教程,利用MIS IP核通过自编逻辑实现对DDR3的读写,强烈推荐(This is a zero to start Xilinx DDR3 control program written tutorial, the use of MIS IP kernel through the self compiled logic to achieve DDR3 reading and writing, strongly recommended.)
- 2018-06-05 21:28:45下载
- 积分:1
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CPLD drives with digital control, of from 0000 to 9999, digital control is a dyn...
用CPLD驱动数码管,实现从0000计到9999,数码管是用动态显示,程序用VERILOG完成的-CPLD drives with digital control, of from 0000 to 9999, digital control is a dynamic display, the program completed with VERILOG
- 2022-05-23 09:34:50下载
- 积分:1
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flash
本程序是fpga控制flash的读写程序,包括了程序和仿真时的测试文件(fpga flash)
- 2013-07-21 14:47:36下载
- 积分:1
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I2C配置tvp5150用VHDL写的
I2C配置tvp5150用VHDL写的 -I2C configuration tvp5150 written using VHDL
- 2023-05-02 14:30:04下载
- 积分:1
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VHDL电子抢答器的实现。有多个文件,主控件是用图行实现。其余各功能模块用VHDL实现...
VHDL电子抢答器的实现。有多个文件,主控件是用图行实现。其余各功能模块用VHDL实现-VHDL electronic Responder realized. A number of documents, the main controls are using maps the bank. The remaining modules using VHDL
- 2022-03-14 00:36:42下载
- 积分:1