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VGA_test
说明： 基于FPGA设计的一段测试VGA接口的VHDL小程序\功能为在显示器上间隔显示横条、竖条以及棋盘格等彩条信号，希望对初学FPGA驱动VGA接口的电子爱好者有用(FPGA-based design of a VGA interface VHDL test applet \ functions for the intervals shown in the display bar, vertical bars and checkerboard patterns and other signals of color, hope for beginners FPGA VGA interface driver useful for electronic enthusiasts)
- 2010-04-06 11:26:58下载
- 积分：1
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一个有关于UART开发的自己的一个VHDL代码
一个有关于UART开发的自己的一个VHDL代码-A UART has developed its own about a VHDL code
- 2023-03-01 05:35:04下载
- 积分：1
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hdb3a
快速实现HDB3码与普通码二进制码的转换，方便学习与了解HDB3码的转换(Quickly achieve HDB3 code and common code binary code conversion, facilitate learning and understanding HDB3 code conversion)
- 2020-11-09 15:09:48下载
- 积分：1
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FPGA设计全流程－软件综合使用、
FPGA设计全流程－软件综合使用、 -FPGA design of the whole process- the integrated use of software, FPGA design of the whole process- the integrated use of software,
- 2022-12-25 07:35:03下载
- 积分：1
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集成电路的I2C协议间
inter integrated circuit i2c protocol
- 2022-02-03 10:59:46下载
- 积分：1
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Sequence Detection VHDL source code, ATERA platform compile. Report detailed des...
序列检测VHDL源代码，ATERA平台编译。详细的报表说明和模拟源代码。
- 2022-10-18 04:30:03下载
- 积分：1
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FPGA_homewrk4
设计一个能求出一个32bit字中两个相邻0之间最大间隙的电路。完成HDL设计及testbench描述，给出综合后的时序仿真结果。提交纸质文档。(Design a circuit that can find the maximum gap between two adjacent 0 in a 32bit word. The HDL design and testbench description are completed, and the result of comprehensive simulation is given. Submit paper documents.)
- 2018-05-07 17:54:12下载
- 积分：1
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Controller RAM read and write, using verilog implementation of easy
RAM读写控制器，用verilog实现的简单易懂的RAMROMsram控制核-Controller RAM read and write, using verilog implementation of easy-to-understand control of nuclear RAMROMsram
- 2022-02-09 14:58:27下载
- 积分：1
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bianyuanjiance
图像采集 VGA输出 图像的边缘 ov7670(V image acquisition VGA output image edge)
- 2020-06-21 13:20:06下载
- 积分：1
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pid_controler_latest.tar
PID控制器的verilog实现，做闭环控制器的人可以参考(PID controller verilog implementation of closed-loop controller may make reference to)
- 2010-10-23 17:09:15下载
- 积分：1
