- 
                        FPGA 高斯滤波器
                        
                          此筛选器是由语言 HDL 设计的。成功模拟上协同作用。此筛选器用于视频和图像处理项目,降低盐及胡椒噪音。                         
                            - 2022-03-16 02:08:29下载
- 积分:1
 
- 
                        i2c驱动
                        
                          i2c驱动程序,分两个模块编写,增加一行代码就可扩展成SCCb协议                         
                            - 2022-01-31 07:44:00下载
- 积分:1
 
- 
                        AskPsk
                        
                          说明:  ask psk 编码调制的vhdl 实现(ask psk coded modulation to achieve the VHDL)                         
                            - 2005-11-26 09:14:32下载
- 积分:1
 
- 
                        18B20PLCD
                        
                          温度液晶显示演示程序
LCD数据线:P0口
LCD控制线:RS P20 RW P21 E P22 BUSY P07
18B20端口DQ     :P27
(Temperature of liquid crystal display demo
Data line: P0 LCD
LCD RS P20 RW P21 control line: E P22 BUSY P07
18B20 DQ : P27 port
)                         
                            - 2011-12-03 23:04:34下载
- 积分:1
 
- 
                        LCD12864
                        
                          LCD12864的显示程序,使用的是verilog语言编写的显示程序,为PDF文档(LCD12864 display program, using Verilog language display program, as a PDF document)                         
                            - 2013-05-11 09:53:44下载
- 积分:1
 
- 
                        XAPP200_ddr_sdram_64b
                        
                          Xapp 200 64 bit DDR SDRAM design files for Xilinx Vertix                         
                            - 2011-01-19 09:45:06下载
- 积分:1
 
- 
                        EEPROM_RD_WR
                        
                          本程序包含:EEPROM的功能模型(eeprom.v)、读/写EEPROM的verilog HDL 行为模块(eeprom_wr.v)、信号产生模块(signal.v)和顶层模块(top.v) ,这样可以有一个完整的EEPROM的控制模块和测试文件,本文件通过测试。(This procedure includes: EEPROM of the functional model (eeprom.v), read/write EEPROM acts of verilog HDL modules (eeprom_wr.v), signal generator module (signal.v) and top-level module (top.v), this can have a EEPROM complete control module and test document, this document is to pass the test.)                         
                            - 2008-12-23 15:04:20下载
- 积分:1
 
- 
                        EDanDanAssistg
                        
                          蛋蛋助手,可以动态配置生成代码格式,方便ORM或或程序员的生成工作 ,经测试
(Egg assistant, can be dynamically configured to generate code format, convenient ORM, or programmer generation work, tested)                         
                            - 2012-09-10 00:33:07下载
- 积分:1
 
- 
                        Core1553BRT_EBR_EV_20
                        
                          actel公司用于1553总线的1553BRT-EBR核心代码 包括文档和代码非常有用(Actel company for the 1553 bus 1553BRT-EBR core code, including documentation and code is very useful)                         
                            - 2021-05-06 18:58:37下载
- 积分:1
 
- 
                        usbd_ucos
                        
                          说明:  基于ALINX AX7020硬件平台的USB-OTG通信程序。操作系统采用uCOS III v1.41,基本实现了双向USB2.0 块传输(Bulk Transfer)通信,zynq的PS端接收USB数据并回传至主机。经测试,主机端Window10系统采用libUSBK编程时,采用64字节的块时,传输速率可达210Mbps。zynq开发工具为Vivado2015.4,程序包中包含了全部的硬件和软件工程文档。(A USB-OTG communication project where an AX7020 platform is employed as USB device. The embeded operating system is uCOS III of version 1.41, and the FPGA toolchain is Vivado 2015.4. This project implements a full speed bidirectional USB2.0 bulk transfer. A test on Windows 10 host with libUSBK shows that the transfer speed is up to 201Mbps.)                         
                            - 2020-09-09 09:38:02下载
- 积分:1