登录
首页 » Verilog » 1位ADPCM编解码器::概述

1位ADPCM编解码器::概述

于 2022-01-26 发布 文件大小:6.18 MB
0 118
下载积分: 2 下载次数: 1

代码说明:

音频编码(ADPCM位) ;

下载说明:请别用迅雷下载,失败请重下,重下不扣分!

发表评论

0 个回复

  • Huffman_enc_dec
    Huffman encoder decoder verilog
    2021-03-21 00:49:17下载
    积分:1
  • GAL16V8(fangzhen74LS138)
    GAL16V8(仿真74LS138),试验通过。包括able及jed文件。对pcb印板设计时,对简化走线特别有用。简单的修改GAL16V8程序,可灵活地进行地址译码修改。(GAL16V8 (simulation 74LS138), test passed. Including the able and jed file. Printed on the pcb board design, especially useful to simplify alignment. Simple modifications GAL16V8 program, the flexibility to change the address decoding.)
    2011-01-26 20:43:01下载
    积分:1
  • ad0809
    adc0809 转换,verilog代码(adc0809 conversion, verilog code)
    2020-12-21 11:09:08下载
    积分:1
  • oooo
    基于fpga和51单片机的等精度频率计,通过fpga对信号进行采集,数据传给单片机计算,再由12864进行显示,可进行频率,周期,脉宽,占空比,幅值等的测量。(Fpga and 51 microcontroller based precision frequency meter, through fpga for signal acquisition, data to the microcontroller to calculate, and then by 12864 for display, can be measured frequency, period, pulse width, duty cycle, the amplitude and the like.)
    2014-11-13 19:02:07下载
    积分:1
  • 6_ImageBasic
    基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像基本操作,几何变换,直方图,灰度化处理等(System Generator based image processing engineering, multimedia processing FPGA implementation source code, the basic operation of the image, geometric transformations, histogram, gray processing)
    2020-10-20 20:07:24下载
    积分:1
  • FIFO
    fifo程序代码,程序编写,测试仿真图形,方便,比较实用(fifo code, programming, testing, simulation graphics, convenient and more practical)
    2016-03-16 10:06:12下载
    积分:1
  • frame_syn
    通信系统中数据的传输以帧为单位,在FPGA中帧头检测是通信系统中的一部分,该程序实现了FPGA中帧头的检测。(Transmission of data in a communication system in units of frames, the frame header is detected in the FPGA part of the communication system, the realization of the frame header is detected in the FPGA.)
    2014-08-27 16:02:54下载
    积分:1
  • 一款商用ADC的verilog
    商用可综合adc,分辨率为16位,内含一个时序检查功能,可供对ADC感兴趣的人有帮助。尤其是需要一个ADC模型的可以使用
    2022-01-25 22:47:37下载
    积分:1
  • frequency divider
    说明:  FPGA对系统50M时钟进行分频。FPGA最基本功能基础(FPGA Verilog program, key detection, program jitter elimination, jitter elimination, delay detection keys)
    2019-04-27 23:35:12下载
    积分:1
  • cordic算法verilog实现代码
    采用verilog编写的经典的cordic算法,旋转模式,亲测可用,经过了9次旋转。cordic算法采用不断旋转求出正弦余弦值,是一种有效地迭代算法
    2022-07-04 20:40:51下载
    积分:1
  • 696516资源总数
  • 106642会员总数
  • 12今日下载