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FIFO
FIFO的源代码，对FIFO设计有帮助，有借鉴意义，帮助学习VHDL编程(FIFO of the source code, on the FIFO design help, there is reference to help learn VHDL programming)
- 2008-04-29 09:00:11下载
- 积分：1
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AMBA_apb
AMBA_APB verilog code
- 2017-08-15 21:05:37下载
- 积分：1
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SPI_UVM_VIP
说明： SPI协议的芯片验证VIP,用UVM搭建平台验证代码(Chip verification VIP of SPI protocol, build platform verification code with UVM)
- 2020-08-25 09:58:15下载
- 积分：1
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FLASH_PCB
M25P64-SPI-FLASH芯片的FPGA控制程序，已仿真验证(M25P64- SPI- FLASH chip FPGA control program, simulation)
- 2020-08-28 16:48:12下载
- 积分：1
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EMAC6
verilog实现的FPGA三态以太网链路层通信代码，里面有状态机，并按各个模块的功能分了文件夹，还有说明文档，自定义帧的产生和接收，开发环境为Xilinx ISE，测试无误。(verilog realization FPGA Tri-Mode Ethernet link layer communication code, which the state machine, according to the function of each module sub folder, as well as documentation, self-defined frame generation and reception, the development environment for the Xilinx ISEtest and correct.)
- 2013-01-09 00:04:20下载
- 积分：1
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fpga_ofdm
这是篇<基于FPGA 的OFDM 宽带数据通信同步系统设计与实现>, 觉得甚是有用，大家共同学学。(This is the article <FPGA-OFDM-based broadband data communication systems design and implementation of synchronous> that even be useful, we all learn together.)
- 2007-06-13 00:02:43下载
- 积分：1
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ROM
4 bit ROM for Quartus
- 2009-09-14 08:45:22下载
- 积分：1
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multiply_8_VHDL
由8 位加法器构成的以时序方式设计的8 位乘法器，采用逐项移位相加的方
法来实现相乘的VHDL程序代码。包含几个小模块和一个顶层设计文件，运行可用。(an 8 bit multiplier combined with 8 bit adder using a design by way of timing,and it use a way of Itemized shift to implement the multiply.It include some little module and a top level design document.)
- 2014-04-11 16:58:04下载
- 积分：1
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Vending-Machine-using-Moore
Vending Machine simulation using Moore sequence
- 2016-05-30 08:24:35下载
- 积分：1
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rectifier
三相PWM整流，实现功率双向流动,可保持直流侧电压稳定(three-phase PWM rectifier, power can bidirectional flow ，can maintain the stable DC voltage)
- 2012-11-28 09:19:54下载
- 积分：1
