适用于FPGA的SOPC方面的程序开发方面，可以用于添加COMPENENT-Applicable to FPGA-SOPC procedures development, can be used to add COMPENENT

vhdl抗抖动滤波器的设计，包括完整的工程-VHDL anti-jitter filter design, including the complete works

页面置换算法中的三种算法相关程序代码 FIFO LUR OPT-yemianzhihuansuanfa

des加密算法的verilog语言的实现-des encryption algorithm to achieve the Verilog language

1024 点得快速傅里叶变换算法 FPGA in verilog(1024 point FFT on a FPGA written in verilog)

这是一个用vHDL语言实现的移位器，可以实现移位功能-This is the design of an shifter using vhdl

有用的VHDL源代码-useful VHDL source code

说明：  HDMI协议的Verilog实现，通过对RGB三个通道分别进行TMDS编码完成，纯原创代码(Verilog implementation of HDMI protocol, through TMDS coding of RGB three channels, pure original code)

使用verilog语言编写的异步串口模块，带有16级深的FIFO，它与DSP28335的SCI相似，可以帮助初学者更快地理解FPGA和DSP的硬件结构和编程思路(Use verilog language of asynchronous serial port module, FIFO with deep level 16, it was similar with DSP28335 SCI, can help beginners to understand faster the FPGA and DSP hardware structure and programming ideas)

本例程位于 VMD642_CPLD目录中。 使用 CPLD 实现辅助译码、LED 指示灯控制、看门狗等各种逻辑控制电路。源程序使 用 Verilog HDL书写，编译开发系统使用 Cypress公司的 Warp 6.3。(This routine is located VMD642_CPLD directory. Using CPLD implementation auxiliary decoding, LED indicator control, watchdog, and other logic control circuitry. Written using Verilog HDL source code, the compiler development system using Cypress' s Warp 6.3.)