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FPGA开发板上实现秒表计数器功能

于 2023-01-08 发布 文件大小:1.16 MB
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代码说明:

这是我上大三时的电子设计题目,叫秒表的功能实现。利用ISE软件进行编程,代码是VHDL语言的,可以实现时(0-9)分(0-59)秒(0-59)即最大10小时的计数,对于不同开发板,可以适当修改代码,使之成为更加广泛的计数器。代码纯原创,请下载。

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