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FPGA中按键弹跳消除模块的研究与应用，原理和例子都非常好
FPGA中按键弹跳消除模块的研究与应用，原理和例子都非常好-FPGA to eliminate bounce in key research and application modules, principles and examples are very good
- 2022-02-20 02:12:06下载
- 积分：1
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vb3draw
这是一个讲究的的 介绍VB在犀牛软件里的 很好的东西 你会满意的 相信我(you will be glad)
- 2013-11-28 14:32:37下载
- 积分：1
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pl_read_write_ps_ddr
说明： PL 和 PS 的高效交互是 zynq 7000 soc 开发的重中之重，常常需要将 PL 端的大量数据实时送到 PS 端处理，或者将 PS 端处理结果实时送到 PL 端处理，但是各种协议非常麻烦，灵活性也比较差，直接通过 AXI 总线来读写 PS 端 ddr 的数据，这里面涉及到 AXI4 协议，vivado 的 FPGA 调试等。(The efficient interaction between PL and PS is the top priority of zynq 7000 SoC development. We often need to send a large amount of data from PL to PS for real-time processing, or send the processing results from PS to pl for real-time processing. In general, we will think of using DMA for processing, but various protocols are very troublesome and the flexibility is poor. This course explains how to use Axi directly Bus to read and write DDR data of PS terminal, which involves axi4 protocol, FPGA debugging of vivado, etc.)
- 2021-01-22 17:46:44下载
- 积分：1
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我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证...
我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证-I used to write VHDL sinusoidal, using FPGA internal ROM, has simulation testbench, you can run in Quartus. Yard has already been verified in the plates
- 2022-07-25 14:12:00下载
- 积分：1
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Beamforming
基于FPGA的波束形成，包括ad转换，数据存储等部分。。(FPGA-based beamforming, including ad conversion, data storage and other parts. .)
- 2016-04-25 11:12:30下载
- 积分：1
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VHDL
Project manager is reak vhdl old man
- 2015-09-10 10:06:28下载
- 积分：1
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i2s_input
基于FPGA的i2s接口输入模块设计，其中有原理图和verilog源码，可在Quartus环境下进行仿真(FPGA-based i2s interface input module design, including schematics and verilog source code, can be simulated in Quartus environment)
- 2020-12-14 16:49:14下载
- 积分：1
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hls_bluebook
非常好的catapult学习书, catabult 可用于高级综合，由c产生vhdl/verilog(very nice book for catabult study)
- 2011-08-18 16:15:08下载
- 积分：1
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这是最后一个，处理器内部ROM，如有需要，大家就顶
这是最后一个，处理器内部ROM，如有需要，大家就顶-this is the last one, the processors internal ROM, if necessary, on the top you
- 2022-01-26 08:01:31下载
- 积分：1
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uart
说明： fpga串口收发完整程序，Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:02下载
- 积分：1
